/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 139 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 140 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg, 143 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg); 145 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg); 146 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT, 148 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT, 953 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in selectFPExt() local 955 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt() 1027 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in selectFPTrunc() local 1029 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 185 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 186 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg, 189 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg); 191 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg); 192 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT, 194 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT, 986 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in selectFPExt() local 988 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in selectFPExt() 1065 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in selectFPTrunc() local 1067 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in selectFPTrunc() [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 164 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, 911 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectFPExt() local 913 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt() 929 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectFPTrunc() local 931 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in SelectFPTrunc() 1173 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectBinaryIntOp() local 1177 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp() 1345 MVT DestVT = VA.getLocVT(); in processCallArgs() local 1347 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs() 1349 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/false)) in processCallArgs() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | CallingConvEmitter.cpp | 223 MVT::SimpleValueType DestVT = getValueType(DestTy); in EmitAction() local 224 O << IndentStr << "LocVT = " << getEnumName(DestVT) <<";\n"; in EmitAction() 225 if (MVT(DestVT).isFloatingPoint()) { in EmitAction() 237 MVT::SimpleValueType DestVT = getValueType(DestTy); in EmitAction() local 238 O << IndentStr << "LocVT = " << getEnumName(DestVT) << ";\n"; in EmitAction() 239 if (MVT(DestVT).isFloatingPoint()) { in EmitAction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 165 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, 960 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectFPExt() local 962 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt() 978 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectFPTrunc() local 980 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in SelectFPTrunc() 1260 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectBinaryIntOp() local 1264 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp() 1432 MVT DestVT = VA.getLocVT(); in processCallArgs() local 1434 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs() 1436 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/false)) in processCallArgs() [all …]
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/external/llvm/utils/TableGen/ |
D | CallingConvEmitter.cpp | 223 MVT::SimpleValueType DestVT = getValueType(DestTy); in EmitAction() local 224 O << IndentStr << "LocVT = " << getEnumName(DestVT) <<";\n"; in EmitAction() 225 if (MVT(DestVT).isFloatingPoint()) { in EmitAction() 237 MVT::SimpleValueType DestVT = getValueType(DestTy); in EmitAction() local 238 O << IndentStr << "LocVT = " << getEnumName(DestVT) << ";\n"; in EmitAction() 239 if (MVT(DestVT).isFloatingPoint()) { in EmitAction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 234 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 235 unsigned emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt); 2831 MVT DestVT; in selectFPToInt() local 2832 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectFPToInt() 2846 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZSUWDr : AArch64::FCVTZSUXDr; in selectFPToInt() 2848 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZUUWDr : AArch64::FCVTZUUXDr; in selectFPToInt() 2851 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZSUWSr : AArch64::FCVTZSUXSr; in selectFPToInt() 2853 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZUUWSr : AArch64::FCVTZUUXSr; in selectFPToInt() 2856 DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass); in selectFPToInt() 2864 MVT DestVT; in selectIntToFP() local [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 188 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 189 unsigned emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt); 2742 MVT DestVT; in selectFPToInt() local 2743 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectFPToInt() 2757 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZSUWDr : AArch64::FCVTZSUXDr; in selectFPToInt() 2759 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZUUWDr : AArch64::FCVTZUUXDr; in selectFPToInt() 2762 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZSUWSr : AArch64::FCVTZSUXSr; in selectFPToInt() 2764 Opc = (DestVT == MVT::i32) ? AArch64::FCVTZUUWSr : AArch64::FCVTZUUXSr; in selectFPToInt() 2767 DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass); in selectFPToInt() 2775 MVT DestVT; in selectIntToFP() local [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 175 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 1737 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectBinaryIntOp() local 1741 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in SelectBinaryIntOp() 1948 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local 1949 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false); in ProcessCallArgs() 1951 ArgVT = DestVT; in ProcessCallArgs() 1957 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local 1958 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true); in ProcessCallArgs() 1960 ArgVT = DestVT; in ProcessCallArgs() 2035 MVT DestVT = RVLocs[0].getValVT(); in FinishCall() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 206 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 1761 EVT DestVT = TLI.getValueType(DL, I->getType(), true); in SelectBinaryIntOp() local 1765 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in SelectBinaryIntOp() 1974 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local 1975 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false); in ProcessCallArgs() 1977 ArgVT = DestVT; in ProcessCallArgs() 1983 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local 1984 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true); in ProcessCallArgs() 1986 ArgVT = DestVT; in ProcessCallArgs() 2062 MVT DestVT = RVLocs[0].getValVT(); in FinishCall() local [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 131 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, 143 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT, 145 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned, 147 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned, 840 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local 841 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps() 867 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps() 873 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); in LegalizeLoadOps() 1668 EVT DestVT, const SDLoc &dl) { in EmitStackConvert() argument 1681 unsigned DestSize = DestVT.getSizeInBits(); in EmitStackConvert() [all …]
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D | SelectionDAGBuilder.cpp | 2707 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitICmp() local 2709 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode)); in visitICmp() 2727 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitFCmp() local 2729 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Condition)); in visitFCmp() 2849 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitTrunc() local 2851 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N)); in visitTrunc() 2858 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitZExt() local 2860 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N)); in visitZExt() 2867 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitSExt() local 2869 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N)); in visitSExt() [all …]
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D | LegalizeTypes.cpp | 924 EVT DestVT) { in CreateStackStoreLoad() argument 928 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT); in CreateStackStoreLoad() 933 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(), in CreateStackStoreLoad()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 133 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, DebugLoc dl); 139 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT, 141 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned, 143 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned, 2027 EVT DestVT, in EmitStackConvert() argument 2041 unsigned DestSize = DestVT.getSizeInBits(); in EmitStackConvert() 2042 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert() 2060 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, in EmitStackConvert() 2064 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, in EmitStackConvert() 2454 EVT DestVT, in ExpandLegalINT_TO_FP() argument [all …]
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D | SelectionDAGBuilder.cpp | 2616 EVT DestVT = TLI.getValueType(I.getType()); in visitICmp() local 2617 setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Opcode)); in visitICmp() 2629 EVT DestVT = TLI.getValueType(I.getType()); in visitFCmp() local 2630 setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Condition)); in visitFCmp() 2663 EVT DestVT = TLI.getValueType(I.getType()); in visitTrunc() local 2664 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), DestVT, N)); in visitTrunc() 2671 EVT DestVT = TLI.getValueType(I.getType()); in visitZExt() local 2672 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), DestVT, N)); in visitZExt() 2679 EVT DestVT = TLI.getValueType(I.getType()); in visitSExt() local 2680 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(), DestVT, N)); in visitSExt() [all …]
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D | LegalizeTypes.cpp | 882 EVT DestVT) { in CreateStackStoreLoad() argument 886 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT); in CreateStackStoreLoad() 891 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(), in CreateStackStoreLoad()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 158 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, 170 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue Op0, EVT DestVT, 172 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned, 174 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned, 867 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local 868 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps() 894 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps() 900 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); in LegalizeLoadOps() 1694 EVT DestVT, const SDLoc &dl) { in EmitStackConvert() argument 1707 unsigned DestSize = DestVT.getSizeInBits(); in EmitStackConvert() [all …]
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D | SelectionDAGBuilder.cpp | 2887 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitICmp() local 2889 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode)); in visitICmp() 2906 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitFCmp() local 2908 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Condition)); in visitFCmp() 3028 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitTrunc() local 3030 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N)); in visitTrunc() 3037 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitZExt() local 3039 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N)); in visitZExt() 3046 EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitSExt() local 3048 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N)); in visitSExt() [all …]
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D | LegalizeTypes.cpp | 883 EVT DestVT) { in CreateStackStoreLoad() argument 887 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT); in CreateStackStoreLoad() 892 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo()); in CreateStackStoreLoad()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMFastISel.cpp | 1687 EVT DestVT = RVLocs[0].getValVT(); in FinishCall() local 1688 TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT); in FinishCall() 1998 EVT SrcVT, DestVT; in SelectIntCast() local 2000 DestVT = TLI.getValueType(DestTy, true); in SelectIntCast() 2005 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in SelectIntCast() 2016 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in SelectIntCast()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 893 MVT DestVT = TLI->getRegisterType(NewVT); in getVectorTypeBreakdownMVT() local 894 RegisterVT = DestVT; in getVectorTypeBreakdownMVT() 895 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT() 896 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdownMVT() 1320 MVT DestVT = getRegisterType(Context, NewVT); in getVectorTypeBreakdown() local 1321 RegisterVT = DestVT; in getVectorTypeBreakdown() 1328 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown() 1329 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdown()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 1871 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument 1872 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType() 1877 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument 1879 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType() 2224 virtual bool isFPExtFree(EVT DestVT, EVT SrcVT) const { in isFPExtFree() argument 2225 assert(SrcVT.isFloatingPoint() && DestVT.isFloatingPoint() && in isFPExtFree() 2233 virtual bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const { in isFPExtFoldable() argument 2234 assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() && in isFPExtFoldable() 2236 return isFPExtFree(DestVT, SrcVT); in isFPExtFoldable()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 1152 MVT DestVT = TLI->getRegisterType(NewVT); in getVectorTypeBreakdownMVT() local 1153 RegisterVT = DestVT; in getVectorTypeBreakdownMVT() 1154 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT() 1155 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdownMVT() 1549 MVT DestVT = getRegisterType(Context, NewVT); in getVectorTypeBreakdown() local 1550 RegisterVT = DestVT; in getVectorTypeBreakdown() 1557 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown() 1558 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdown()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 817 bool AMDGPUTargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const { in isNarrowingProfitable() 824 return SrcVT.getSizeInBits() > 32 && DestVT.getSizeInBits() == 32; in isNarrowingProfitable() 2413 EVT DestVT = Op.getValueType(); in LowerUINT_TO_FP() local 2414 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerUINT_TO_FP() 2426 if (DestVT == MVT::f32) in LowerUINT_TO_FP() 2429 assert(DestVT == MVT::f64); in LowerUINT_TO_FP() 2440 EVT DestVT = Op.getValueType(); in LowerSINT_TO_FP() local 2441 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerSINT_TO_FP() 2453 if (DestVT == MVT::f32) in LowerSINT_TO_FP() 2456 assert(DestVT == MVT::f64); in LowerSINT_TO_FP() [all …]
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 624 bool AMDGPUTargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const { in isNarrowingProfitable() 631 return SrcVT.getSizeInBits() > 32 && DestVT.getSizeInBits() == 32; in isNarrowingProfitable() 2016 EVT DestVT = Op.getValueType(); in LowerUINT_TO_FP() local 2017 if (DestVT == MVT::f64) in LowerUINT_TO_FP() 2020 if (DestVT == MVT::f32) in LowerUINT_TO_FP() 2031 EVT DestVT = Op.getValueType(); in LowerSINT_TO_FP() local 2032 if (DestVT == MVT::f32) in LowerSINT_TO_FP() 2035 if (DestVT == MVT::f64) in LowerSINT_TO_FP() 2570 EVT DestVT = N->getValueType(0); in PerformDAGCombine() local 2571 if (DestVT.getSizeInBits() != 64 && !DestVT.isVector()) in PerformDAGCombine() [all …]
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