| /external/llvm/lib/Target/AMDGPU/ |
| D | GCNHazardRecognizer.cpp | 45 if (SIInstrInfo::isSMRD(*MI) && checkSMRDHazards(MI) > 0) in getHazardType()
48 if (SIInstrInfo::isVMEM(*MI) && checkVMEMHazards(MI) > 0) in getHazardType()
51 if (SIInstrInfo::isDPP(*MI) && checkDPPHazards(MI) > 0) in getHazardType()
62 if (SIInstrInfo::isSMRD(*MI)) in PreEmitNoops()
65 if (SIInstrInfo::isVMEM(*MI)) in PreEmitNoops()
68 if (SIInstrInfo::isDPP(*MI)) in PreEmitNoops()
85 const SIInstrInfo *TII = ST.getInstrInfo(); in AdvanceCycle()
164 if (!MI || !SIInstrInfo::isSMRD(*MI)) in checkSMEMSoftClauseHazards()
199 const SIInstrInfo *TII = ST.getInstrInfo(); in checkSMRDHazards()
224 const SIInstrInfo *TII = ST.getInstrInfo(); in checkVMEMHazards()
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| D | SIInstrInfo.cpp | 31 SIInstrInfo::SIInstrInfo(const SISubtarget &ST) in SIInstrInfo() function in SIInstrInfo
78 bool SIInstrInfo::isReallyTriviallyReMaterializable(const MachineInstr &MI, in isReallyTriviallyReMaterializable()
93 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr()
205 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs()
299 bool SIInstrInfo::shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps()
341 void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
502 int SIInstrInfo::commuteOpcode(const MachineInstr &MI) const { in commuteOpcode()
522 unsigned SIInstrInfo::getMovOpcode(const TargetRegisterClass *DstRC) const { in getMovOpcode()
570 void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot()
669 void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, in loadRegFromStackSlot()
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| D | SIShrinkInstructions.cpp | 80 static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII, in canShrink()
129 static void foldImmediates(MachineInstr &MI, const SIInstrInfo *TII, in foldImmediates()
193 static bool isKImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKImmOperand()
203 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | SIFoldOperands.cpp | 134 const SIInstrInfo *TII) { in tryAddToFoldList()
195 const SIInstrInfo *TII, const SIRegisterInfo &TRI, in foldOperand()
302 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | SISchedule.td | 15 const SIInstrInfo *TII =
16 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
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| D | SIRegisterInfo.cpp | 255 if (!SIInstrInfo::isMUBUF(*MI)) in getFrameIndexInstrOffset()
283 const SIInstrInfo *TII = Subtarget.getInstrInfo(); in materializeFrameBaseRegister()
309 const SIInstrInfo *TII = Subtarget.getInstrInfo(); in resolveFrameIndex()
364 return SIInstrInfo::isMUBUF(*MI) && isUInt<12>(Offset); in isFrameOffsetLegal()
423 const SIInstrInfo *TII = ST.getInstrInfo(); in buildScratchLoadStore()
504 const SIInstrInfo *TII = ST.getInstrInfo(); in eliminateFrameIndex()
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| D | AMDGPUSubtarget.h | 342 SIInstrInfo InstrInfo;
351 const SIInstrInfo *getInstrInfo() const override { in getInstrInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | GCNHazardRecognizer.cpp | 103 static unsigned getHWReg(const SIInstrInfo *TII, const MachineInstr &RegInstr) { in getHWReg()
113 if (SIInstrInfo::isSMRD(*MI) && checkSMRDHazards(MI) > 0) in getHazardType()
117 if ((SIInstrInfo::isVMEM(*MI) || in getHazardType()
118 SIInstrInfo::isFLAT(*MI)) in getHazardType()
122 if (SIInstrInfo::isVALU(*MI) && checkVALUHazards(MI) > 0) in getHazardType()
125 if (SIInstrInfo::isDPP(*MI) && checkDPPHazards(MI) > 0) in getHazardType()
168 if (SIInstrInfo::isSMRD(*MI)) in PreEmitNoops()
171 if (SIInstrInfo::isVALU(*MI)) in PreEmitNoops()
174 if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isFLAT(*MI)) in PreEmitNoops()
177 if (SIInstrInfo::isDPP(*MI)) in PreEmitNoops()
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| D | SIInstrInfo.cpp | 87 SIInstrInfo::SIInstrInfo(const GCNSubtarget &ST) in SIInstrInfo() function in SIInstrInfo
135 bool SIInstrInfo::isReallyTriviallyReMaterializable(const MachineInstr &MI, in isReallyTriviallyReMaterializable()
150 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr()
267 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs()
404 bool SIInstrInfo::shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps()
466 bool SIInstrInfo::shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, in shouldScheduleLoadsNear()
478 static void reportIllegalCopy(const SIInstrInfo *TII, MachineBasicBlock &MBB, in reportIllegalCopy()
493 void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
600 int SIInstrInfo::commuteOpcode(unsigned Opcode) const { in commuteOpcode()
618 void SIInstrInfo::materializeImmediate(MachineBasicBlock &MBB, in materializeImmediate()
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| D | SIFrameLowering.h | 17 class SIInstrInfo; variable
57 const SIInstrInfo *TII,
64 const SIInstrInfo *TII,
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| D | SIShrinkInstructions.cpp | 67 static bool canShrink(MachineInstr &MI, const SIInstrInfo *TII, in canShrink()
123 static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII, in foldImmediates()
189 static bool isKImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKImmOperand()
195 static bool isKUImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKUImmOperand()
201 static bool isKImmOrKUImmOperand(const SIInstrInfo *TII, in isKImmOrKUImmOperand()
219 static bool isReverseInlineImm(const SIInstrInfo *TII, in isReverseInlineImm()
243 static void shrinkScalarCompare(const SIInstrInfo *TII, MachineInstr &MI) { in shrinkScalarCompare()
287 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | SIPeepholeSDWA.cpp | 75 const SIInstrInfo *TII;
119 virtual MachineInstr *potentialToConvert(const SIInstrInfo *TII) = 0;
120 virtual bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) = 0;
152 MachineInstr *potentialToConvert(const SIInstrInfo *TII) override;
153 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
160 uint64_t getSrcMods(const SIInstrInfo *TII,
179 MachineInstr *potentialToConvert(const SIInstrInfo *TII) override;
180 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
200 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
333 uint64_t SDWASrcOperand::getSrcMods(const SIInstrInfo *TII, in getSrcMods()
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| D | AMDGPUMacroFusion.cpp | 33 const SIInstrInfo &TII = static_cast<const SIInstrInfo&>(TII_); in shouldScheduleAdjacent()
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| D | AMDGPUMCInstLower.cpp | 84 case SIInstrInfo::MO_GOTPCREL: in getVariantKind()
86 case SIInstrInfo::MO_GOTPCREL32_LO: in getVariantKind()
88 case SIInstrInfo::MO_GOTPCREL32_HI: in getVariantKind()
90 case SIInstrInfo::MO_REL32_LO: in getVariantKind()
92 case SIInstrInfo::MO_REL32_HI: in getVariantKind()
167 const auto *TII = static_cast<const SIInstrInfo*>(ST.getInstrInfo()); in lower()
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| D | SIFrameLowering.cpp | 41 const SIInstrInfo *TII = ST.getInstrInfo(); in emitFlatScratchInit()
102 const SIInstrInfo *TII, in getReservedPrivateSegmentBufferReg()
153 const SIInstrInfo *TII, in getReservedPrivateSegmentWaveByteOffsetReg()
237 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEntryFunctionPrologue()
372 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEntryFunctionScratchSetup()
541 const SIInstrInfo *TII = ST.getInstrInfo(); in emitPrologue()
611 const SIInstrInfo *TII = ST.getInstrInfo(); in emitEpilogue()
672 const SIInstrInfo *TII = ST.getInstrInfo(); in processFunctionBeforeFrameFinalized()
754 const SIInstrInfo *TII = ST.getInstrInfo(); in eliminateCallFramePseudoInstr()
783 const SIInstrInfo *TII = ST.getInstrInfo(); in emitDebuggerPrologue()
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| D | SIOptimizeExecMasking.cpp | 141 static bool removeTerminatorBit(const SIInstrInfo &TII, MachineInstr &MI) { in removeTerminatorBit()
165 const SIInstrInfo &TII, in fixTerminators()
180 const SIInstrInfo &TII, in findExecCopy()
214 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | GCNHazardRecognizer.h | 29 class SIInstrInfo; variable
41 const SIInstrInfo &TII;
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| D | SIOptimizeExecMaskingPreRA.cpp | 84 const SIInstrInfo &TII) { in getOrNonExecReg()
95 const SIInstrInfo &TII, in getOrExecSource()
112 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | AMDGPUInstructionSelector.h | 39 class SIInstrInfo; variable
93 const SIInstrInfo &TII;
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| D | SIFormMemoryClauses.cpp | 101 return SIInstrInfo::isFLAT(MI) || SIInstrInfo::isVMEM(MI); in isVMEMClauseInst()
105 return SIInstrInfo::isSMRD(MI); in isSMEMClauseInst()
303 const SIInstrInfo *TII = ST->getInstrInfo(); in runOnMachineFunction()
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| D | SIFixSGPRCopies.cpp | 197 const SIInstrInfo *TII) { in tryChangeVGPRtoSGPRinCopy()
235 const SIInstrInfo *TII, in foldVGPRCopyIntoRegSequence()
307 const SIInstrInfo *TII) { in phiHasVGPROperands()
354 const SIInstrInfo *TII, in isSafeToFoldImmIntoCopy()
574 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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| D | SIRegisterInfo.cpp | 272 assert(SIInstrInfo::isMUBUF(*MI)); in getMUBUFInstrOffset()
281 if (!SIInstrInfo::isMUBUF(*MI)) in getFrameIndexInstrOffset()
312 const SIInstrInfo *TII = Subtarget.getInstrInfo(); in materializeFrameBaseRegister()
341 const SIInstrInfo *TII = Subtarget.getInstrInfo(); in resolveFrameIndex()
375 if (!SIInstrInfo::isMUBUF(*MI)) in isFrameOffsetLegal()
482 static bool buildMUBUFOffsetLoadStore(const SIInstrInfo *TII, in buildMUBUFOffsetLoadStore()
528 const SIInstrInfo *TII = ST.getInstrInfo(); in buildSpillLoadStore()
656 const SIInstrInfo *TII = ST.getInstrInfo(); in spillSGPR()
834 const SIInstrInfo *TII = ST.getInstrInfo(); in restoreSGPR()
994 const SIInstrInfo *TII = ST.getInstrInfo(); in eliminateFrameIndex()
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| D | SISchedule.td | 15 const SIInstrInfo *TII =
16 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
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| D | SIFoldOperands.cpp | 77 const SIInstrInfo *TII;
121 static bool isInlineConstantIfFolded(const SIInstrInfo *TII, in isInlineConstantIfFolded()
227 const SIInstrInfo *TII) { in tryAddToFoldList()
304 static bool isUseSafeToFold(const SIInstrInfo *TII, in isUseSafeToFold()
531 const SIInstrInfo *TII, in tryConstantFoldOp()
631 static bool tryFoldInst(const SIInstrInfo *TII, in tryFoldInst()
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| D | SIFixVGPRCopies.cpp | 52 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
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