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Searched refs:ShiftAmt (Results 1 – 25 of 94) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/AtomicExpand/SPARC/
Dpartword.ll19 ; CHECK: %ShiftAmt = trunc i64 %3 to i32
20 ; CHECK: %Mask = shl i32 255, %ShiftAmt
23 ; CHECK: %5 = shl i32 %4, %ShiftAmt
25 ; CHECK: %7 = shl i32 %6, %ShiftAmt
42 ; CHECK: %18 = lshr i32 %14, %ShiftAmt
64 ; CHECK: %ShiftAmt = trunc i64 %3 to i32
65 ; CHECK: %Mask = shl i32 65535, %ShiftAmt
68 ; CHECK: %5 = shl i32 %4, %ShiftAmt
70 ; CHECK: %7 = shl i32 %6, %ShiftAmt
87 ; CHECK: %18 = lshr i32 %14, %ShiftAmt
[all …]
/external/llvm/test/Transforms/AtomicExpand/SPARC/
Dpartword.ll19 ; CHECK: %ShiftAmt = trunc i64 %3 to i32
20 ; CHECK: %Mask = shl i32 255, %ShiftAmt
23 ; CHECK: %5 = shl i32 %4, %ShiftAmt
25 ; CHECK: %7 = shl i32 %6, %ShiftAmt
42 ; CHECK: %18 = lshr i32 %14, %ShiftAmt
64 ; CHECK: %ShiftAmt = trunc i64 %3 to i32
65 ; CHECK: %Mask = shl i32 65535, %ShiftAmt
68 ; CHECK: %5 = shl i32 %4, %ShiftAmt
70 ; CHECK: %7 = shl i32 %6, %ShiftAmt
87 ; CHECK: %18 = lshr i32 %14, %ShiftAmt
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/
DAPInt.h205 void shlSlowCase(unsigned ShiftAmt);
208 void lshrSlowCase(unsigned ShiftAmt);
211 void ashrSlowCase(unsigned ShiftAmt);
904 APInt &operator<<=(unsigned ShiftAmt) {
905 assert(ShiftAmt <= BitWidth && "Invalid shift amount");
907 if (ShiftAmt == BitWidth)
910 U.VAL <<= ShiftAmt;
913 shlSlowCase(ShiftAmt);
922 APInt &operator<<=(const APInt &ShiftAmt);
946 APInt ashr(unsigned ShiftAmt) const { in ashr() argument
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/external/llvm/lib/Analysis/
DDemandedBits.cpp147 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1); in determineLiveOperandBits() local
148 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
154 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in determineLiveOperandBits()
156 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
163 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1); in determineLiveOperandBits() local
164 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
169 AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
176 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1); in determineLiveOperandBits() local
177 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
181 if ((AOut & APInt::getHighBitsSet(BitWidth, ShiftAmt)) in determineLiveOperandBits()
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DValueTracking.cpp799 unsigned ShiftAmt = SA->getLimitedValue(BitWidth-1); in computeKnownBitsFromShiftOperator() local
802 KnownZero = KZF(KnownZero, ShiftAmt); in computeKnownBitsFromShiftOperator()
803 KnownOne = KOF(KnownOne, ShiftAmt); in computeKnownBitsFromShiftOperator()
836 for (unsigned ShiftAmt = 0; ShiftAmt < BitWidth; ++ShiftAmt) { in computeKnownBitsFromShiftOperator() local
839 if ((ShiftAmt & ~ShiftAmtKZ) != ShiftAmt) in computeKnownBitsFromShiftOperator()
841 if ((ShiftAmt | ShiftAmtKO) != ShiftAmt) in computeKnownBitsFromShiftOperator()
846 if (ShiftAmt == 0) { in computeKnownBitsFromShiftOperator()
854 KnownZero &= KZF(KnownZero2, ShiftAmt); in computeKnownBitsFromShiftOperator()
855 KnownOne &= KOF(KnownOne2, ShiftAmt); in computeKnownBitsFromShiftOperator()
1023 auto KZF = [BitWidth](const APInt &KnownZero, unsigned ShiftAmt) { in computeKnownBitsFromOperator() argument
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/
DDemandedBits.cpp158 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
159 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
165 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in determineLiveOperandBits()
167 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
173 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
174 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
179 AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
185 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
186 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
190 if ((AOut & APInt::getHighBitsSet(BitWidth, ShiftAmt)) in determineLiveOperandBits()
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DValueTracking.cpp881 unsigned ShiftAmt = SA->getLimitedValue(BitWidth-1); in computeKnownBitsFromShiftOperator() local
884 Known.Zero = KZF(Known.Zero, ShiftAmt); in computeKnownBitsFromShiftOperator()
885 Known.One = KOF(Known.One, ShiftAmt); in computeKnownBitsFromShiftOperator()
932 for (unsigned ShiftAmt = 0; ShiftAmt < BitWidth; ++ShiftAmt) { in computeKnownBitsFromShiftOperator() local
935 if ((ShiftAmt & ~ShiftAmtKZ) != ShiftAmt) in computeKnownBitsFromShiftOperator()
937 if ((ShiftAmt | ShiftAmtKO) != ShiftAmt) in computeKnownBitsFromShiftOperator()
942 if (ShiftAmt == 0) { in computeKnownBitsFromShiftOperator()
950 Known.Zero &= KZF(Known2.Zero, ShiftAmt); in computeKnownBitsFromShiftOperator()
951 Known.One &= KOF(Known2.One, ShiftAmt); in computeKnownBitsFromShiftOperator()
1155 auto KZF = [NSW](const APInt &KnownZero, unsigned ShiftAmt) { in computeKnownBitsFromOperator() argument
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
DInstCombineSimplifyDemanded.cpp576 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
577 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); in SimplifyDemandedUseBits()
582 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in SimplifyDemandedUseBits()
584 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in SimplifyDemandedUseBits()
590 KnownZero <<= ShiftAmt; in SimplifyDemandedUseBits()
591 KnownOne <<= ShiftAmt; in SimplifyDemandedUseBits()
593 if (ShiftAmt) in SimplifyDemandedUseBits()
594 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); in SimplifyDemandedUseBits()
600 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
603 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt)); in SimplifyDemandedUseBits()
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DInstCombineCasts.cpp565 uint32_t ShiftAmt = KnownZeroMask.logBase2(); in transformZExtICmp() local
567 if (ShiftAmt) { in transformZExtICmp()
570 In = Builder->CreateLShr(In, ConstantInt::get(In->getType(),ShiftAmt), in transformZExtICmp()
936 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local
938 if (ShiftAmt) in transformSExtICmp()
940 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
950 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
952 if (ShiftAmt) in transformSExtICmp()
954 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
/external/llvm/lib/Transforms/InstCombine/
DInstCombineSimplifyDemanded.cpp566 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
567 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); in SimplifyDemandedUseBits()
572 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in SimplifyDemandedUseBits()
574 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in SimplifyDemandedUseBits()
580 KnownZero <<= ShiftAmt; in SimplifyDemandedUseBits()
581 KnownOne <<= ShiftAmt; in SimplifyDemandedUseBits()
583 if (ShiftAmt) in SimplifyDemandedUseBits()
584 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); in SimplifyDemandedUseBits()
590 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
593 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt)); in SimplifyDemandedUseBits()
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DInstCombineCasts.cpp784 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local
785 BitsToClear = ShiftAmt < BitsToClear ? BitsToClear - ShiftAmt : 0; in canEvaluateZExtd()
1018 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local
1020 if (ShiftAmt) in transformSExtICmp()
1022 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
1032 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
1034 if (ShiftAmt) in transformSExtICmp()
1036 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/
DInstCombineSimplifyDemanded.cpp455 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
456 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); in SimplifyDemandedUseBits()
461 DemandedMaskIn.setHighBits(ShiftAmt+1); in SimplifyDemandedUseBits()
463 DemandedMaskIn.setHighBits(ShiftAmt); in SimplifyDemandedUseBits()
468 Known.Zero <<= ShiftAmt; in SimplifyDemandedUseBits()
469 Known.One <<= ShiftAmt; in SimplifyDemandedUseBits()
471 if (ShiftAmt) in SimplifyDemandedUseBits()
472 Known.Zero.setLowBits(ShiftAmt); in SimplifyDemandedUseBits()
479 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
482 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt)); in SimplifyDemandedUseBits()
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DInstCombineCasts.cpp756 unsigned ShiftAmt = Cst->getZExtValue(); in visitTrunc() local
763 if (ShiftAmt <= MaxAmt) { in visitTrunc()
766 std::min(ShiftAmt, ASize - 1))); in visitTrunc()
768 Value *Shift = Builder.CreateAShr(A, std::min(ShiftAmt, ASize - 1)); in visitTrunc()
1000 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local
1001 BitsToClear = ShiftAmt < BitsToClear ? BitsToClear - ShiftAmt : 0; in canEvaluateZExtd()
1236 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local
1238 if (ShiftAmt) in transformSExtICmp()
1240 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
1250 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
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/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp97 const unsigned ShiftAmt = ToIdx * 16; in replicateChunk() local
100 const uint64_t Chunk = getChunk(Imm, FromIdx) << ShiftAmt; in replicateChunk()
102 Imm &= ~(0xFFFFLL << ShiftAmt); in replicateChunk()
114 const unsigned ShiftAmt = ChunkIdx * 16; in tryOrrMovk() local
134 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryOrrMovk()
195 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
198 for (; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
199 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
212 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryToreplicateChunks()
223 for (ShiftAmt += 16; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
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DAArch64ConditionOptimizer.cpp165 unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm()); in findSuitableCompare() local
169 } else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) { in findSuitableCompare()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/
DVNCoercion.cpp108 uint64_t ShiftAmt = DL.getTypeStoreSizeInBits(StoredValTy) - in coerceAvailableValueToLoadTypeHelper() local
111 StoredVal, ConstantInt::get(StoredVal->getType(), ShiftAmt)); in coerceAvailableValueToLoadTypeHelper()
330 unsigned ShiftAmt; in getStoreValueForLoadHelper() local
332 ShiftAmt = Offset * 8; in getStoreValueForLoadHelper()
334 ShiftAmt = (StoreSize - LoadSize - Offset) * 8; in getStoreValueForLoadHelper()
335 if (ShiftAmt) in getStoreValueForLoadHelper()
337 ConstantInt::get(SrcVal->getType(), ShiftAmt)); in getStoreValueForLoadHelper()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelDAGToDAG.cpp917 SDValue ShiftAmt = N->getOperand(1); in SelectSHLi64() local
918 EVT ShiftAmtVT = ShiftAmt.getValueType(); in SelectSHLi64()
934 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(ShiftAmt)) { in SelectSHLi64()
954 ShiftAmt, in SelectSHLi64()
958 ShiftAmt, in SelectSHLi64()
985 SDValue ShiftAmt = N->getOperand(1); in SelectSRLi64() local
986 EVT ShiftAmtVT = ShiftAmt.getValueType(); in SelectSRLi64()
993 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(ShiftAmt)) { in SelectSRLi64()
1013 ShiftAmt, in SelectSRLi64()
1017 ShiftAmt, in SelectSRLi64()
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/external/swiftshader/third_party/LLVM/lib/Analysis/
DValueTracking.cpp329 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); in ComputeMaskedBits() local
330 APInt Mask2(Mask.lshr(ShiftAmt)); in ComputeMaskedBits()
334 KnownZero <<= ShiftAmt; in ComputeMaskedBits()
335 KnownOne <<= ShiftAmt; in ComputeMaskedBits()
336 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); // low bits known 0 in ComputeMaskedBits()
344 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); in ComputeMaskedBits() local
347 APInt Mask2(Mask.shl(ShiftAmt)); in ComputeMaskedBits()
351 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); in ComputeMaskedBits()
352 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); in ComputeMaskedBits()
354 KnownZero |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in ComputeMaskedBits()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp166 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
169 for (; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
170 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
183 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryToreplicateChunks()
194 for (ShiftAmt += 16; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
195 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
207 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryToreplicateChunks()
DAArch64ConditionOptimizer.cpp174 unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm()); in findSuitableCompare() local
178 } else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) { in findSuitableCompare()
DAArch64ISelDAGToDAG.cpp273 unsigned ShiftAmt; in SelectArithImmed() local
276 ShiftAmt = 0; in SelectArithImmed()
278 ShiftAmt = 12; in SelectArithImmed()
283 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed()
1907 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
1908 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
1910 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
1915 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
1916 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
1918 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DAtomicExpandPass.cpp578 Value *ShiftAmt; member
631 Ret.ShiftAmt = Builder.CreateShl(PtrLSB, 3); in createMaskInstrs()
634 Ret.ShiftAmt = in createMaskInstrs()
638 Ret.ShiftAmt = Builder.CreateTrunc(Ret.ShiftAmt, Ret.WordType, "ShiftAmt"); in createMaskInstrs()
640 ConstantInt::get(Ret.WordType, (1 << ValueSize * 8) - 1), Ret.ShiftAmt, in createMaskInstrs()
684 Builder.CreateLShr(Loaded, PMV.ShiftAmt), PMV.ValueType); in performMaskedAtomicOp()
687 Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in performMaskedAtomicOp()
718 PMV.ShiftAmt, "ValOperand_Shifted"); in expandPartwordAtomicRMW()
731 Builder.CreateLShr(OldResult, PMV.ShiftAmt), PMV.ValueType); in expandPartwordAtomicRMW()
799 Builder.CreateShl(Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in expandPartwordCmpXchg()
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/external/llvm/lib/CodeGen/
DAtomicExpandPass.cpp568 Value *ShiftAmt; member
621 Ret.ShiftAmt = Builder.CreateShl(PtrLSB, 3); in createMaskInstrs()
624 Ret.ShiftAmt = in createMaskInstrs()
628 Ret.ShiftAmt = Builder.CreateTrunc(Ret.ShiftAmt, Ret.WordType, "ShiftAmt"); in createMaskInstrs()
630 ConstantInt::get(Ret.WordType, (1 << ValueSize * 8) - 1), Ret.ShiftAmt, in createMaskInstrs()
674 Builder.CreateLShr(Loaded, PMV.ShiftAmt), PMV.ValueType); in performMaskedAtomicOp()
677 Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in performMaskedAtomicOp()
709 PMV.ShiftAmt, "ValOperand_Shifted"); in expandPartwordAtomicRMW()
722 Builder.CreateLShr(OldResult, PMV.ShiftAmt), PMV.ValueType); in expandPartwordAtomicRMW()
790 Builder.CreateShl(Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in expandPartwordCmpXchg()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCodeEmitter.cpp1413 unsigned ShiftAmt = MI.getOperand(OpIdx).getImm(); in emitMiscArithInstruction() local
1415 assert(ShiftAmt != 0 && "PKHTB shift_imm is 0!"); in emitMiscArithInstruction()
1416 if (ShiftAmt == 32) in emitMiscArithInstruction()
1417 ShiftAmt = 0; in emitMiscArithInstruction()
1419 assert(ShiftAmt < 32 && "shift_imm range is 0 to 31!"); in emitMiscArithInstruction()
1420 Binary |= ShiftAmt << ARMII::ShiftShift; in emitMiscArithInstruction()
1456 unsigned ShiftAmt = MI.getOperand(3).getImm(); in emitSaturateInstruction() local
1457 if (ShiftAmt == 32 && Opc == ARM_AM::asr) in emitSaturateInstruction()
1458 ShiftAmt = 0; in emitSaturateInstruction()
1459 assert(ShiftAmt < 32 && "shift_imm range is 0 to 31!"); in emitSaturateInstruction()
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/external/swiftshader/third_party/subzero/src/
DIceInstARM32.h115 uint16_t ShiftAmt = 0,
118 OperandARM32Mem(Func, Ty, Base, Index, ShiftOp, ShiftAmt, Mode);
124 uint16_t getShiftAmt() const { return ShiftAmt; } in getShiftAmt()
155 ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode);
161 uint16_t ShiftAmt; variable
311 ShiftKind ShiftOp, Operand *ShiftAmt) { in create() argument
313 OperandARM32FlexReg(Func, Ty, Reg, ShiftOp, ShiftAmt); in create()
327 Operand *getShiftAmt() const { return ShiftAmt; } in getShiftAmt()
331 Operand *ShiftAmt);
335 Operand *ShiftAmt; variable

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