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Searched refs:phy_write (Results 1 – 25 of 52) sorted by relevance

123

/external/u-boot/drivers/net/phy/
Dmarvell.c112 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, devaddr); in m88e1xxx_phy_extread()
114 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, oldpage); in m88e1xxx_phy_extread()
124 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, devaddr); in m88e1xxx_phy_extwrite()
125 phy_write(phydev, MDIO_DEVAD_NONE, regnum, val); in m88e1xxx_phy_extwrite()
126 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, oldpage); in m88e1xxx_phy_extwrite()
135 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in m88e1011s_config()
137 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in m88e1011s_config()
138 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x200c); in m88e1011s_config()
139 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in m88e1011s_config()
140 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0); in m88e1011s_config()
[all …]
Dmeson-gxl.c43 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_startup()
46 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_startup()
49 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_startup()
52 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_startup()
57 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x8D80); in meson_gxl_startup()
103 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_phy_config()
104 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_phy_config()
105 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_phy_config()
106 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_phy_config()
109 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x8E0D); in meson_gxl_phy_config()
[all …]
Datheros.c21 phy_write(phydev, MDIO_DEVAD_NONE, 0x00, 0x1200); in ar8021_config()
22 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in ar8021_config()
23 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); in ar8021_config()
33 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG, in ar8031_config()
35 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, in ar8031_config()
41 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG, in ar8031_config()
43 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, in ar8031_config()
59 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007); in ar8035_config()
60 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in ar8035_config()
61 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in ar8035_config()
[all …]
Dvitesse.c73 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT, in vitesse_config()
76 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_EXT_CON1, in vitesse_config()
125 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT, in cis8204_config()
131 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON, in cis8204_config()
135 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON, in cis8204_config()
154 return phy_write(phydev, MDIO_DEVAD_NONE, MII_VSC8601_EPHY_CTL, ret); in vsc8601_add_skew()
174 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8574_config()
181 phy_write(phydev, MDIO_DEVAD_NONE, in vsc8574_config()
184 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18, in vsc8574_config()
189 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19, val); in vsc8574_config()
[all …]
Dbroadcom.c42 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, in bcm_phy_write_misc()
47 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg_val); in bcm_phy_write_misc()
50 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg_val); in bcm_phy_write_misc()
52 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, value); in bcm_phy_write_misc()
139 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, reg); in bcm5482_config()
142 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, in bcm5482_config()
146 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg); in bcm5482_config()
149 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_SHD, in bcm5482_config()
152 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, in bcm5482_config()
154 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, in bcm5482_config()
[all …]
Dmscc.c142 phy_write(phydev, MDIO_DEVAD_NONE, in mscc_vsc8531_vsc8541_init_scripts()
147 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in mscc_vsc8531_vsc8541_init_scripts()
154 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17, reg_val); in mscc_vsc8531_vsc8541_init_scripts()
155 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in mscc_vsc8531_vsc8541_init_scripts()
160 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in mscc_vsc8531_vsc8541_init_scripts()
168 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18, reg_val); in mscc_vsc8531_vsc8541_init_scripts()
169 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in mscc_vsc8531_vsc8541_init_scripts()
174 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in mscc_vsc8531_vsc8541_init_scripts()
182 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18, reg_val); in mscc_vsc8531_vsc8541_init_scripts()
188 phy_write(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17, reg_val); in mscc_vsc8531_vsc8541_init_scripts()
[all …]
Drealtek.c82 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in rtl8211x_config()
87 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER, in rtl8211x_config()
98 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg); in rtl8211x_config()
103 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, in rtl8211x_config()
105 phy_write(phydev, MDIO_DEVAD_NONE, in rtl8211x_config()
112 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG, reg); in rtl8211x_config()
113 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, in rtl8211x_config()
128 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in rtl8211f_config()
130 phy_write(phydev, MDIO_DEVAD_NONE, in rtl8211f_config()
141 phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg); in rtl8211f_config()
[all …]
Dti.c121 phy_write(phydev, addr, MII_MMD_CTRL, devad); in phy_read_mmd_indirect()
124 phy_write(phydev, addr, MII_MMD_DATA, prtad); in phy_read_mmd_indirect()
127 phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); in phy_read_mmd_indirect()
154 phy_write(phydev, addr, MII_MMD_CTRL, devad); in phy_write_mmd_indirect()
157 phy_write(phydev, addr, MII_MMD_DATA, prtad); in phy_write_mmd_indirect()
160 phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); in phy_write_mmd_indirect()
163 phy_write(phydev, addr, MII_MMD_DATA, data); in phy_write_mmd_indirect()
232 phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL, in dp83867_config()
236 ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, in dp83867_config()
242 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, in dp83867_config()
[all …]
Dmicrel_ksz90x1.c219 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9021_phy_extended_write()
221 return phy_write(phydev, MDIO_DEVAD_NONE, in ksz9021_phy_extended_write()
228 phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_CTRL, regnum); in ksz9021_phy_extended_read()
267 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000); in ksz9021_config()
292 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
295 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
298 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
301 return phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
308 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_read()
310 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_read()
[all …]
Dnatsemi.c21 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp83630_config()
22 phy_write(phydev, MDIO_DEVAD_NONE, DP83630_PHY_PAGESEL_REG, 0x6); in dp83630_config()
26 phy_write(phydev, MDIO_DEVAD_NONE, DP83630_PHY_PTP_COC_REG, in dp83630_config()
28 phy_write(phydev, MDIO_DEVAD_NONE, DP83630_PHY_PAGESEL_REG, 0); in dp83630_config()
57 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp838xx_config()
Daquantia.c32 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val); in aquantia_config()
40 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, in aquantia_config()
48 phy_write(phydev, MDIO_MMD_AN, AQUNTIA_10G_CTL, 1); in aquantia_config()
49 phy_write(phydev, MDIO_MMD_AN, AQUNTIA_VENDOR_P1, 0x9440); in aquantia_config()
56 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val); in aquantia_config()
Ddavicom.c28 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_ISOLATE); in dm9161_config()
30 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_SCR, in dm9161_config()
33 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_DM9161_10BTCSR, in dm9161_config()
Dteranetics.c32 phy_write(phydev, 30, 93, 2); in tn2020_config()
33 phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an); in tn2020_config()
35 phy_write(phydev, 30, 93, 1); in tn2020_config()
/external/u-boot/board/spear/x600/
Dx600.c83 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00); in board_phy_config()
110 phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020); in board_phy_config()
116 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001); in board_phy_config()
119 phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); in board_phy_config()
120 phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); in board_phy_config()
123 phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea); in board_phy_config()
126 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000); in board_phy_config()
129 phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049); in board_phy_config()
/external/u-boot/board/congatec/cgtqmx6eval/
Dcgtqmx6eval.c336 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
337 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 4); in mx6_rgmii_rework()
338 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_POST_INC_W | 0x2); in mx6_rgmii_rework()
339 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x0000); in mx6_rgmii_rework()
341 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
342 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 5); in mx6_rgmii_rework()
343 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_POST_INC_W | 0x2); in mx6_rgmii_rework()
344 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, MII_KSZ9031_MOD_REG); in mx6_rgmii_rework()
346 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
347 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 6); in mx6_rgmii_rework()
[all …]
/external/u-boot/board/compulab/cl-som-imx7/
Dcl-som-imx7.c135 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); in cl_som_imx7_rgmii_rework()
136 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); in cl_som_imx7_rgmii_rework()
137 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); in cl_som_imx7_rgmii_rework()
140 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in cl_som_imx7_rgmii_rework()
143 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in cl_som_imx7_rgmii_rework()
144 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in cl_som_imx7_rgmii_rework()
145 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in cl_som_imx7_rgmii_rework()
150 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in cl_som_imx7_rgmii_rework()
153 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in cl_som_imx7_rgmii_rework()
156 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in cl_som_imx7_rgmii_rework()
/external/u-boot/board/Marvell/db-mv784mp-gp/
Ddb-mv784mp-gp.c95 phy_write(phydev, MDIO_DEVAD_NONE, 0x16, 4); in board_phy_config()
97 phy_write(phydev, MDIO_DEVAD_NONE, 0x0, 0x1140); in board_phy_config()
99 phy_write(phydev, MDIO_DEVAD_NONE, 0x16, 0); in board_phy_config()
104 phy_write(phydev, MDIO_DEVAD_NONE, 0x4, reg); in board_phy_config()
107 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000); in board_phy_config()
108 phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x9140); in board_phy_config()
113 phy_write(phydev, MDIO_DEVAD_NONE, ETH_PHY_CTRL_REG, reg); in board_phy_config()
/external/u-boot/board/k+p/kp_imx6q_tpc/
Dkp_imx6q_tpc.c140 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in ar8031_phy_fixup()
141 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in ar8031_phy_fixup()
142 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in ar8031_phy_fixup()
147 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in ar8031_phy_fixup()
150 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in ar8031_phy_fixup()
153 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in ar8031_phy_fixup()
/external/u-boot/board/technexion/pico-imx7d/
Dpico-imx7d.c192 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in board_phy_config()
193 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in board_phy_config()
194 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in board_phy_config()
199 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in board_phy_config()
202 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in board_phy_config()
205 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in board_phy_config()
/external/u-boot/board/gdsys/a38x/
Dihs_phys.c32 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0004); in ihs_phy_config()
35 phy_write(phydev, MDIO_DEVAD_NONE, 16, reg); in ihs_phy_config()
47 phy_write(phydev, MDIO_DEVAD_NONE, 26, reg); in ihs_phy_config()
50 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000); in ihs_phy_config()
53 phy_write(phydev, MDIO_DEVAD_NONE, 4, reg); in ihs_phy_config()
56 phy_write(phydev, MDIO_DEVAD_NONE, 9, reg); in ihs_phy_config()
61 phy_write(phydev, MDIO_DEVAD_NONE, 16, reg); in ihs_phy_config()
/external/u-boot/board/keymile/kmp204x/
Deth.c63 phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0003); in board_phy_config()
64 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x0840); in board_phy_config()
65 phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0000); in board_phy_config()
/external/u-boot/board/compulab/cm_fx6/
Dcm_fx6.c372 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); in mx6_rgmii_rework()
373 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); in mx6_rgmii_rework()
374 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); in mx6_rgmii_rework()
377 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in mx6_rgmii_rework()
380 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in mx6_rgmii_rework()
381 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in mx6_rgmii_rework()
382 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in mx6_rgmii_rework()
387 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in mx6_rgmii_rework()
390 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in mx6_rgmii_rework()
393 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in mx6_rgmii_rework()
/external/u-boot/board/tbs/tbs2910/
Dtbs2910.c366 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in ar8035_phy_fixup()
367 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in ar8035_phy_fixup()
368 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in ar8035_phy_fixup()
373 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in ar8035_phy_fixup()
376 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in ar8035_phy_fixup()
379 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in ar8035_phy_fixup()
/external/u-boot/board/wandboard/
Dwandboard.c214 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in ar8031_phy_fixup()
215 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in ar8031_phy_fixup()
216 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in ar8031_phy_fixup()
226 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in ar8031_phy_fixup()
229 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in ar8031_phy_fixup()
232 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in ar8031_phy_fixup()
/external/u-boot/board/advantech/dms-ba16/
Ddms-ba16.c297 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in mx6_rgmii_rework()
299 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in mx6_rgmii_rework()
301 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in mx6_rgmii_rework()
303 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x18); in mx6_rgmii_rework()
305 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in mx6_rgmii_rework()
308 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); in mx6_rgmii_rework()

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