| /external/u-boot/arch/arm/mach-imx/ |
| D | cache.c | 83 struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE; in v7_outer_cache_enable() local
92 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
99 setbits_le32(&pl310->pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE); in v7_outer_cache_enable()
110 writel(0x132, &pl310->pl310_tag_latency_ctrl); in v7_outer_cache_enable()
111 writel(0x132, &pl310->pl310_data_latency_ctrl); in v7_outer_cache_enable()
113 val = readl(&pl310->pl310_prefetch_ctrl); in v7_outer_cache_enable()
131 writel(val, &pl310->pl310_prefetch_ctrl); in v7_outer_cache_enable()
133 val = readl(&pl310->pl310_power_ctrl); in v7_outer_cache_enable()
136 writel(val, &pl310->pl310_power_ctrl); in v7_outer_cache_enable()
138 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
[all …]
|
| /external/u-boot/arch/arm/lib/ |
| D | cache-pl310.c | 14 struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; variable
18 writel(0, &pl310->pl310_cache_sync); in pl310_cache_sync()
25 assoc_16 = readl(&pl310->pl310_aux_ctrl) & in pl310_background_op_all_ways()
43 pl310_background_op_all_ways(&pl310->pl310_inv_way); in v7_outer_cache_inval_all()
48 pl310_background_op_all_ways(&pl310->pl310_clean_inv_way); in v7_outer_cache_flush_all()
64 writel(pa, &pl310->pl310_clean_inv_line_pa); in v7_outer_cache_flush_range()
98 writel(pa, &pl310->pl310_inv_line_pa); in v7_outer_cache_inval_range()
|
| D | Makefile | 36 obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
|
| /external/u-boot/arch/arm/mach-socfpga/ |
| D | misc.c | 26 static const struct pl310_regs *const pl310 = variable
61 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
64 setbits_le32(&pl310->pl310_aux_ctrl, in v7_outer_cache_enable()
70 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
76 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_disable()
|
| D | spl.c | 32 static struct pl310_regs *const pl310 = variable
107 writel(0x1, &pl310->pl310_addr_filter_start); in board_init_f()
|
| D | misc_arria10.c | 31 static struct pl310_regs *const pl310 = variable
102 writel(0x1, &pl310->pl310_addr_filter_start); in arch_early_init_r()
|
| D | misc_gen5.c | 28 static struct pl310_regs *const pl310 = variable
209 writel(0x1, &pl310->pl310_addr_filter_start); in arch_early_init_r()
|
| /external/u-boot/arch/arm/mach-mvebu/ |
| D | cpu.c | 384 struct pl310_regs *const pl310 = in arch_cpu_init() local
412 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in arch_cpu_init()
616 struct pl310_regs *const pl310 = in v7_outer_cache_enable() local
633 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
639 struct pl310_regs *const pl310 = in v7_outer_cache_disable() local
642 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_disable()
|
| /external/u-boot/arch/arm/dts/ |
| D | zynq-7000.dtsi | 148 compatible = "arm,pl310-cache";
|
| D | rk3xxx.dtsi | 81 compatible = "arm,pl310-cache";
|
| D | armada-38x.dtsi | 144 compatible = "arm,pl310-cache";
|
| D | socfpga.dtsi | 628 compatible = "arm,pl310-cache";
|
| D | armada-375.dtsi | 177 compatible = "arm,pl310-cache";
|
| D | socfpga_arria10.dtsi | 614 compatible = "arm,pl310-cache";
|
| D | tegra20.dtsi | 162 compatible = "arm,pl310-cache";
|
| D | imx6sll.dtsi | 170 compatible = "arm,pl310-cache";
|
| D | tegra30.dtsi | 247 compatible = "arm,pl310-cache";
|
| D | stih407-family.dtsi | 89 compatible = "arm,pl310-cache";
|
| D | imx6sl.dtsi | 119 compatible = "arm,pl310-cache";
|
| D | am4372.dtsi | 64 compatible = "arm,pl310-cache";
|
| D | imx6qdl.dtsi | 181 compatible = "arm,pl310-cache";
|
| D | imx6sx.dtsi | 153 compatible = "arm,pl310-cache";
|
| D | sama5d4.dtsi | 277 compatible = "arm,pl310-cache";
|