/system/core/libpixelflinger/codeflinger/ |
D | ARMAssemblerInterface.h | 124 int Rd, int Rn, 129 int Rd, int Rm, int Rs, int Rn) = 0; 131 int Rd, int Rm, int Rs) = 0; 154 virtual void LDR (int cc, int Rd, 156 virtual void LDRB(int cc, int Rd, 158 virtual void STR (int cc, int Rd, 160 virtual void STRB(int cc, int Rd, 163 virtual void LDRH (int cc, int Rd, 165 virtual void LDRSB(int cc, int Rd, 167 virtual void LDRSH(int cc, int Rd, [all …]
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D | ARMAssemblerProxy.cpp | 161 int Rd, int Rn, uint32_t Op2) in dataProcessing() argument 163 mTarget->dataProcessing(opcode, cc, s, Rd, Rn, Op2); in dataProcessing() 166 void ARMAssemblerProxy::MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) { in MLA() argument 167 mTarget->MLA(cc, s, Rd, Rm, Rs, Rn); in MLA() 169 void ARMAssemblerProxy::MUL(int cc, int s, int Rd, int Rm, int Rs) { in MUL() argument 170 mTarget->MUL(cc, s, Rd, Rm, Rs); in MUL() 212 void ARMAssemblerProxy::LDR(int cc, int Rd, int Rn, uint32_t offset) { in LDR() argument 213 mTarget->LDR(cc, Rd, Rn, offset); in LDR() 215 void ARMAssemblerProxy::LDRB(int cc, int Rd, int Rn, uint32_t offset) { in LDRB() argument 216 mTarget->LDRB(cc, Rd, Rn, offset); in LDRB() [all …]
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D | Arm64Assembler.cpp | 340 int s, int Rd, int Rn, uint32_t Op2) in dataProcessingCommon() argument 397 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon() 398 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon() 399 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon() 400 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon() 401 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; in dataProcessingCommon() 408 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument 415 Wd = Rd; in dataProcessing() 455 *mPC++ = A64_CSEL_W(Rd, mTmpReg1, Rd, cc); in dataProcessing() 463 int s, int Rd, int Rn, uint32_t Op2) in ADDR_ADD() argument [all …]
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D | Arm64Assembler.h | 99 int Rd, int Rn, 102 int Rd, int Rm, int Rs, int Rn); 104 int Rd, int Rm, int Rs); 123 virtual void ADDR_LDR(int cc, int Rd, 125 virtual void ADDR_ADD(int cc, int s, int Rd, 127 virtual void ADDR_SUB(int cc, int s, int Rd, 129 virtual void ADDR_STR (int cc, int Rd, 132 virtual void LDR (int cc, int Rd, 134 virtual void LDRB(int cc, int Rd, 136 virtual void STR (int cc, int Rd, [all …]
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D | ARMAssemblerProxy.h | 80 int Rd, int Rn, 83 int Rd, int Rm, int Rs, int Rn); 85 int Rd, int Rm, int Rs); 104 virtual void LDR (int cc, int Rd, 106 virtual void LDRB(int cc, int Rd, 108 virtual void STR (int cc, int Rd, 110 virtual void STRB(int cc, int Rd, 112 virtual void LDRH (int cc, int Rd, 114 virtual void LDRSB(int cc, int Rd, 116 virtual void LDRSH(int cc, int Rd, [all …]
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D | MIPSAssembler.cpp | 349 void ArmToMipsAssembler::protectConditionalOperands(int Rd) in protectConditionalOperands() argument 351 if (Rd == cond.r1) { in protectConditionalOperands() 355 if (cond.type == CMP_COND && Rd == cond.r2) { in protectConditionalOperands() 412 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument 418 protectConditionalOperands(Rd); in dataProcessing() 429 mMips->AND(Rd, Rn, src); in dataProcessing() 431 mMips->ANDI(Rd, Rn, src); in dataProcessing() 438 mMips->ADDU(Rd, Rn, src); in dataProcessing() 440 mMips->ADDIU(Rd, Rn, src); in dataProcessing() 447 mMips->SUBU(Rd, Rn, src); in dataProcessing() [all …]
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D | MIPSAssembler.h | 91 int Rd, int Rn, 94 int Rd, int Rm, int Rs, int Rn); 96 int Rd, int Rm, int Rs); 115 virtual void LDR (int cc, int Rd, 117 virtual void LDRB(int cc, int Rd, 119 virtual void STR (int cc, int Rd, 121 virtual void STRB(int cc, int Rd, 123 virtual void LDRH (int cc, int Rd, 125 virtual void LDRSB(int cc, int Rd, 127 virtual void LDRSH(int cc, int Rd, [all …]
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D | MIPS64Assembler.cpp | 334 void ArmToMips64Assembler::protectConditionalOperands(int Rd) in protectConditionalOperands() argument 336 if (Rd == cond.r1) { in protectConditionalOperands() 340 if (cond.type == CMP_COND && Rd == cond.r2) { in protectConditionalOperands() 392 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument 397 protectConditionalOperands(Rd); in dataProcessing() 408 mMips->AND(Rd, Rn, src); in dataProcessing() 410 mMips->ANDI(Rd, Rn, src); in dataProcessing() 417 mMips->ADDU(Rd, Rn, src); in dataProcessing() 419 mMips->ADDIU(Rd, Rn, src); in dataProcessing() 426 mMips->SUBU(Rd, Rn, src); in dataProcessing() [all …]
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D | ARMAssembler.cpp | 203 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument 205 *mPC++ = (cc<<28) | (opcode<<21) | (s<<20) | (Rn<<16) | (Rd<<12) | Op2; in dataProcessing() 215 int Rd, int Rm, int Rs, int Rn) { in MLA() argument 216 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA() 217 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA() 219 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm; in MLA() 222 int Rd, int Rm, int Rs) { in MUL() argument 223 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL() 224 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL() 225 *mPC++ = (cc<<28) | (s<<20) | (Rd<<16) | (Rs<<8) | 0x90 | Rm; in MUL() [all …]
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D | ARMAssembler.h | 91 int Rd, int Rn, 94 int Rd, int Rm, int Rs, int Rn); 96 int Rd, int Rm, int Rs); 115 virtual void LDR (int cc, int Rd, 117 virtual void LDRB(int cc, int Rd, 119 virtual void STR (int cc, int Rd, 121 virtual void STRB(int cc, int Rd, 123 virtual void LDRH (int cc, int Rd, 125 virtual void LDRSB(int cc, int Rd, 127 virtual void LDRSH(int cc, int Rd, [all …]
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D | MIPS64Assembler.h | 96 int Rd, int Rn, 99 int Rd, int Rm, int Rs, int Rn); 101 int Rd, int Rm, int Rs); 120 virtual void LDR (int cc, int Rd, 122 virtual void LDRB(int cc, int Rd, 124 virtual void STR (int cc, int Rd, 126 virtual void STRB(int cc, int Rd, 128 virtual void LDRH (int cc, int Rd, 130 virtual void LDRSB(int cc, int Rd, 132 virtual void LDRSH(int cc, int Rd, [all …]
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D | ARMAssemblerInterface.cpp | 69 void ARMAssemblerInterface::ADDR_LDR(int cc, int Rd, in ADDR_LDR() argument 72 LDR(cc, Rd, Rn, offset); in ADDR_LDR() 74 void ARMAssemblerInterface::ADDR_STR(int cc, int Rd, in ADDR_STR() argument 77 STR(cc, Rd, Rn, offset); in ADDR_STR() 80 int Rd, int Rn, uint32_t Op2) in ADDR_ADD() argument 82 dataProcessing(opADD, cc, s, Rd, Rn, Op2); in ADDR_ADD() 85 int Rd, int Rn, uint32_t Op2) in ADDR_SUB() argument 87 dataProcessing(opSUB, cc, s, Rd, Rn, Op2); in ADDR_SUB()
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/system/core/libpixelflinger/tests/arch-arm64/assembler/ |
D | arm64_assembler_test.cpp | 413 void dataOpTest(dataOpTest_t test, ARMAssemblerInterface *a64asm, uint32_t Rd = 0, in dataOpTest() argument 427 regs[Rd] = test.RdValue; in dataOpTest() 449 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 450 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 451 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 452 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 453 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 454 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 455 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break; in dataOpTest() 456 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break; in dataOpTest() [all …]
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/system/core/libpixelflinger/tests/arch-mips64/assembler/ |
D | mips64_assembler_test.cpp | 371 void dataOpTest(dataOpTest_t test, ArmToMips64Assembler *a64asm, uint32_t Rd = R_v1, in dataOpTest() argument 385 regs[Rd] = test.RdValue; in dataOpTest() 411 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 412 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 413 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 414 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 415 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 416 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest() 417 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break; in dataOpTest() 418 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break; in dataOpTest() [all …]
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