/external/u-boot/arch/microblaze/cpu/ |
D | interrupts.c | 38 microblaze_intc_t *intc; variable 52 mask = intc->ier; in enable_one_interrupt() 53 intc->ier = (mask | offset); in enable_one_interrupt() 56 intc->ier); in enable_one_interrupt() 57 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in enable_one_interrupt() 58 intc->iar, intc->mer); in enable_one_interrupt() 67 mask = intc->ier; in disable_one_interrupt() 68 intc->ier = (mask & ~offset); in disable_one_interrupt() 71 intc->ier); in disable_one_interrupt() 72 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in disable_one_interrupt() [all …]
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/external/u-boot/arch/arm/dts/ |
D | zynq-7000.dtsi | 51 interrupt-parent = <&intc>; 70 interrupt-parent = <&intc>; 77 interrupt-parent = <&intc>; 88 interrupt-parent = <&intc>; 100 interrupt-parent = <&intc>; 112 interrupt-parent = <&intc>; 121 interrupt-parent = <&intc>; 132 interrupt-parent = <&intc>; 139 intc: interrupt-controller@f8f01000 { label 184 interrupt-parent = <&intc>; [all …]
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D | zynq-cse-qspi.dtsi | 40 interrupt-parent = <&intc>; 43 intc: interrupt-controller@f8f01000 { label 56 interrupt-parent = <&intc>;
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D | omap3-evm-common.dtsi | 61 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 62 interrupt-parent = <&intc>; 118 interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
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D | logicpd-torpedo-som.dtsi | 80 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 81 interrupt-parent = <&intc>; 111 interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; 186 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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D | logicpd-som-lv.dtsi | 78 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 79 interrupt-parent = <&intc>; 97 interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; 227 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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D | bcm2836.dtsi | 12 compatible = "brcm,bcm2836-l1-intc"; 74 &intc {
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D | bcm2837.dtsi | 12 compatible = "brcm,bcm2836-l1-intc"; 72 &intc {
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D | socfpga_stratix10.dtsi | 58 interrupt-parent = <&intc>; 66 intc: intc@fffc1000 { label 81 interrupt-parent = <&intc>;
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D | omap3-evm-processor-common.dtsi | 172 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>; 176 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; 180 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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D | kirkwood.dtsi | 10 interrupt-parent = <&intc>; 210 compatible = "marvell,orion-bridge-intc"; 230 intc: main-interrupt-ctrl@20200 { label 231 compatible = "marvell,orion-intc";
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D | da850.dtsi | 18 intc: interrupt-controller@fffee000 { label 19 compatible = "ti,cp-intc"; 22 ti,intc-size = <101>; 34 interrupt-parent = <&intc>; 44 interrupt-parent = <&intc>;
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D | omap3.dtsi | 17 interrupt-parent = <&intc>; 201 intc: interrupt-controller@48200000 { label 202 compatible = "ti,omap3-intc"; 291 interrupts-extended = <&intc 72>; 302 interrupts-extended = <&intc 73>; 313 interrupts-extended = <&intc 74>;
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D | omap3-beagle-xm.dts | 274 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 275 interrupt-parent = <&intc>; 337 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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D | omap3-beagle.dts | 267 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 268 interrupt-parent = <&intc>; 322 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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D | kirkwood-98dx4122.dtsi | 30 interrupt-map = <0 0 0 0 &intc 9>;
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D | r8a7792-blanche.dts | 208 intc { 210 function = "intc";
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D | tegra20.dtsi | 145 interrupt-parent = <&intc>; 152 intc: interrupt-controller@50041000 { label 158 interrupt-parent = <&intc>; 178 interrupt-parent = <&intc>; 596 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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D | logicpd-som-lv-37xx-devkit.dts | 163 interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>; 256 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
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D | kirkwood-6192.dtsi | 30 interrupt-map = <0 0 0 0 &intc 9>;
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/external/u-boot/arch/nds32/dts/ |
D | ag101p.dts | 6 interrupt-parent = <&intc>; 36 intc: interrupt-controller { label
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D | ae3xx.dts | 6 interrupt-parent = <&intc>; 43 intc: interrupt-controller { label
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/external/u-boot/doc/device-tree-bindings/i2c/ |
D | i2c-cdns.txt | 18 interrupt-parent = <&intc>;
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/external/u-boot/doc/device-tree-bindings/spi/ |
D | spi-zynq-qspi.txt | 22 interrupt-parent = <&intc>;
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D | spi-zynq.txt | 27 interrupt-parent = <&intc>;
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