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Searched defs:CONFIG_SYS_DDR_TIMING_0 (Results 1 – 25 of 28) sorted by relevance

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/external/u-boot/include/configs/km/
Dkm-mpc8360.h53 #define CONFIG_SYS_DDR_TIMING_0 (\ macro
Dkm-mpc832x.h57 #define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ macro
Dkm-mpc8309.h92 #define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ macro
/external/u-boot/include/configs/
Dve8313.h53 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
Dmpc8308_p1m.h65 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC8323ERDB.h40 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC832XEMDS.h40 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC8308RDB.h61 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
Dsocrates.h82 #define CONFIG_SYS_DDR_TIMING_0 0x00260802 macro
Dids8313.h61 #define CONFIG_SYS_DDR_TIMING_0 ((3 << TIMING_CFG0_RWT_SHIFT) |\ macro
DMPC8313ERDB_NOR.h76 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC8313ERDB_NAND.h104 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC8349EMDS.h79 #define CONFIG_SYS_DDR_TIMING_0 0x00220802 macro
DMPC837XEMDS.h69 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC8315ERDB.h58 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DMPC8349EMDS_SDRAM.h79 #define CONFIG_SYS_DDR_TIMING_0 0x00220802 macro
DMPC837XERDB.h83 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
Dhrcon.h50 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
Dp1_twr.h99 #define CONFIG_SYS_DDR_TIMING_0 0x00220004 macro
Dstrider.h50 #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ macro
DUCP1020.h223 #define CONFIG_SYS_DDR_TIMING_0 0x00330004 macro
Dsbc8641d.h124 #define CONFIG_SYS_DDR_TIMING_0 0x00220802 macro
DMPC8569MDS.h90 #define CONFIG_SYS_DDR_TIMING_0 0x00330004 macro
DMPC8572DS.h98 #define CONFIG_SYS_DDR_TIMING_0 0x00260802 macro
DMPC8536DS.h106 #define CONFIG_SYS_DDR_TIMING_0 0x00260802 macro

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