Searched refs:TEGRA_MC_BASE (Results 1 – 13 of 13) sorted by relevance
| /external/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/ |
| D | memctrl_v1.h | 49 return mmio_read_32(TEGRA_MC_BASE + off); in tegra_mc_read_32()
54 mmio_write_32(TEGRA_MC_BASE + off, val); in tegra_mc_write_32()
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| D | memctrl_v2.h | 103 return mmio_read_32(TEGRA_MC_BASE + off); in tegra_mc_read_32()
108 mmio_write_32(TEGRA_MC_BASE + off, val); in tegra_mc_write_32()
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| D | smmu.h | 827 .reg = TEGRA_MC_BASE + MC_SMMU_BYPASS_CONFIG, \
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| /external/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/memctrl/ |
| D | memctrl_v1.c | 218 mcerr = mmio_read_32(TEGRA_MC_BASE + MC_INTSTATUS); in tegra_memctrl_clear_pending_interrupts()
222 mmio_write_32((TEGRA_MC_BASE + MC_INTSTATUS), mcerr); in tegra_memctrl_clear_pending_interrupts()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/include/t132/ |
| D | tegra_def.h | 92 #define TEGRA_MC_BASE U(0x70019000) macro
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| D | plat_trampoline.S | 129 mov x0, #TEGRA_MC_BASE
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| D | plat_setup.c | 72 MAP_REGION_FLAT(TEGRA_MC_BASE, 0x10000U, /* 64KB */
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/ |
| D | plat_trampoline.S | 128 mov x0, #TEGRA_MC_BASE
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| D | plat_setup.c | 75 MAP_REGION_FLAT(TEGRA_MC_BASE, 0x8000U, /* 32KB */
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| /external/arm-trusted-firmware/plat/nvidia/tegra/include/t210/ |
| D | tegra_def.h | 220 #define TEGRA_MC_BASE U(0x70019000) macro
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| /external/arm-trusted-firmware/plat/nvidia/tegra/include/t186/ |
| D | tegra_def.h | 133 #define TEGRA_MC_BASE U(0x02C10000) macro
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| /external/arm-trusted-firmware/plat/nvidia/tegra/include/t194/ |
| D | tegra_def.h | 65 #define TEGRA_MC_BASE U(0x02C10000) macro
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/drivers/se/ |
| D | security_engine.c | 972 val = mmio_read_32(TEGRA_MC_BASE + MC_SMMU_PPCS_ASID_0); in tegra_se_suspend()
974 mmio_write_32(TEGRA_MC_BASE + MC_SMMU_PPCS_ASID_0, val); in tegra_se_suspend()
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