/external/u-boot/drivers/ddr/marvell/a38x/ |
D | mv_ddr_topology.c | 48 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_topology_map_update() 143 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_bus_bit_mask_get() 173 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_if_bus_width_get() 203 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_cs_num_get() 222 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_is_ecc_ena() 247 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_mem_sz_per_cs_get() 288 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_rtt_nom_get() 301 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_rtt_park_get() 318 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_rtt_wr_get() 335 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_dic_get()
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D | ddr3_debug.c | 36 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_user_log_level_set() 116 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_reg_dump() 301 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in print_device_info() 346 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_log() 517 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_stability_log() 678 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_read_adll_value() 712 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_write_adll_value() 747 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in read_phase_value() 775 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in write_leveling_value() 836 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_adll() [all …]
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D | ddr3_training.c | 188 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_pad_inv() 283 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_configure_cs() 349 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in hws_ddr3_tip_init_controller() 680 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_rev2_rank_control() 734 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_rev3_rank_control() 844 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_pre_algo_config() 877 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_post_algo_config() 1021 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_if_polling() 1095 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_bus_read_modify_write() 1129 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in adll_calibration() [all …]
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D | ddr_topology_def.h | 100 struct mv_ddr_topology_map { struct 177 struct mv_ddr_topology_map tm;
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D | ddr3_training_ip_engine.c | 358 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training() 577 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_pattern_to_odpg() 710 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_read_training_result() 850 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_all_pattern_to_mem() 878 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_pattern_to_mem() 976 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training_wrapper_int() 1127 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training_wrapper() 1462 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_phy_values() 1532 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_training_ip_test() 1606 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_get_pattern_table() [all …]
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D | ddr3_training_leveling.c | 51 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_read_leveling() 319 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_legacy_dynamic_write_leveling() 360 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_legacy_dynamic_read_leveling() 414 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_per_bit_read_leveling() 770 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_calc_cs_mask() 821 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling() 1180 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling_supp() 1375 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_xsb_compare_test() 1466 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling_seq() 1533 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_read_leveling_seq() [all …]
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D | mv_ddr_plat.c | 617 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in prfa_read() 686 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_training_mask_set() 879 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_early_init() 922 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_silicon_post_init() 1033 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_fast_path_dynamic_cs_size_config() 1150 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_save_and_set_training_windows() 1375 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_configure_phy()
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D | ddr3_training_bist.c | 79 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_bist_read_result() 125 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in hws_ddr3_run_bist() 188 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_bist_res() 226 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_tip_bist() 488 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_dm_vw_get()
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D | ddr3_training_ip.h | 141 struct mv_ddr_topology_map *topology);
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D | ddr3_training_centralization.c | 65 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_centralization() 510 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_special_rx() 700 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_centralization_result()
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D | mv_ddr_topology.h | 314 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void);
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D | ddr3_training_hw_algo.c | 169 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_vref() 633 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_cmd_addr_init_delay()
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D | ddr3_training_ip_prv_if.h | 65 u32 dev_num, struct mv_ddr_topology_map *tm);
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D | ddr3_init.h | 163 void print_topology(struct mv_ddr_topology_map *tm);
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/external/arm-trusted-firmware/plat/marvell/a8k/a80x0_mcbin/board/ |
D | dram_port.c | 28 static struct mv_ddr_topology_map board_topology_map = { 88 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() 115 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology()
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/external/arm-trusted-firmware/plat/marvell/a8k/a80x0/board/ |
D | dram_port.c | 34 static struct mv_ddr_topology_map board_topology_map = { 94 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() 124 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology()
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/external/arm-trusted-firmware/plat/marvell/a8k/a70x0/board/ |
D | dram_port.c | 27 static struct mv_ddr_topology_map board_topology_map = { 86 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/arm-trusted-firmware/plat/marvell/a8k/a70x0_amc/board/ |
D | dram_port.c | 27 static struct mv_ddr_topology_map board_topology_map = { 86 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/kobol/helios4/ |
D | helios4.c | 53 static struct mv_ddr_topology_map board_topology_map = { 75 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/Marvell/db-88f6820-amc/ |
D | db-88f6820-amc.c | 54 static struct mv_ddr_topology_map board_topology_map = { 76 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/solidrun/clearfog/ |
D | clearfog.c | 52 static struct mv_ddr_topology_map board_topology_map = { 74 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/Marvell/db-88f6820-gp/ |
D | db-88f6820-gp.c | 75 static struct mv_ddr_topology_map board_topology_map = { 97 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/alliedtelesis/x530/ |
D | x530.c | 50 static struct mv_ddr_topology_map board_topology_map = { 72 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/gdsys/a38x/ |
D | controlcenterdc.c | 52 static struct mv_ddr_topology_map ddr_topology_map = { 138 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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/external/u-boot/board/CZ.NIC/turris_omnia/ |
D | turris_omnia.c | 267 static struct mv_ddr_topology_map board_topology_map_1g = { 289 static struct mv_ddr_topology_map board_topology_map_2g = { 311 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
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