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Searched refs:mv_ddr_topology_map (Results 1 – 25 of 27) sorted by relevance

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/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_topology.c48 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_topology_map_update()
143 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_bus_bit_mask_get()
173 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_if_bus_width_get()
203 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_cs_num_get()
222 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_is_ecc_ena()
247 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_mem_sz_per_cs_get()
288 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_rtt_nom_get()
301 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_rtt_park_get()
318 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_rtt_wr_get()
335 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_dic_get()
Dddr3_debug.c36 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_user_log_level_set()
116 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_reg_dump()
301 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in print_device_info()
346 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_log()
517 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_stability_log()
678 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_read_adll_value()
712 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_write_adll_value()
747 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in read_phase_value()
775 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in write_leveling_value()
836 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_adll()
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Dddr3_training.c188 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_pad_inv()
283 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_configure_cs()
349 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in hws_ddr3_tip_init_controller()
680 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_rev2_rank_control()
734 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_rev3_rank_control()
844 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_pre_algo_config()
877 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_post_algo_config()
1021 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_if_polling()
1095 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_bus_read_modify_write()
1129 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in adll_calibration()
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Dddr_topology_def.h100 struct mv_ddr_topology_map { struct
177 struct mv_ddr_topology_map tm;
Dddr3_training_ip_engine.c358 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training()
577 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_pattern_to_odpg()
710 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_read_training_result()
850 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_all_pattern_to_mem()
878 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_pattern_to_mem()
976 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training_wrapper_int()
1127 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training_wrapper()
1462 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_phy_values()
1532 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_training_ip_test()
1606 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_get_pattern_table()
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Dddr3_training_leveling.c51 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_read_leveling()
319 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_legacy_dynamic_write_leveling()
360 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_legacy_dynamic_read_leveling()
414 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_per_bit_read_leveling()
770 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_calc_cs_mask()
821 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling()
1180 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling_supp()
1375 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_xsb_compare_test()
1466 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling_seq()
1533 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_read_leveling_seq()
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Dmv_ddr_plat.c617 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in prfa_read()
686 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_training_mask_set()
879 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_early_init()
922 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_silicon_post_init()
1033 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_fast_path_dynamic_cs_size_config()
1150 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_save_and_set_training_windows()
1375 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_configure_phy()
Dddr3_training_bist.c79 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_bist_read_result()
125 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in hws_ddr3_run_bist()
188 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_bist_res()
226 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_tip_bist()
488 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_dm_vw_get()
Dddr3_training_ip.h141 struct mv_ddr_topology_map *topology);
Dddr3_training_centralization.c65 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_centralization()
510 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_special_rx()
700 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_centralization_result()
Dmv_ddr_topology.h314 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void);
Dddr3_training_hw_algo.c169 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_vref()
633 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_cmd_addr_init_delay()
Dddr3_training_ip_prv_if.h65 u32 dev_num, struct mv_ddr_topology_map *tm);
Dddr3_init.h163 void print_topology(struct mv_ddr_topology_map *tm);
/external/arm-trusted-firmware/plat/marvell/a8k/a80x0_mcbin/board/
Ddram_port.c28 static struct mv_ddr_topology_map board_topology_map = {
88 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
115 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology()
/external/arm-trusted-firmware/plat/marvell/a8k/a80x0/board/
Ddram_port.c34 static struct mv_ddr_topology_map board_topology_map = {
94 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
124 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in plat_marvell_dram_update_topology()
/external/arm-trusted-firmware/plat/marvell/a8k/a70x0/board/
Ddram_port.c27 static struct mv_ddr_topology_map board_topology_map = {
86 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/arm-trusted-firmware/plat/marvell/a8k/a70x0_amc/board/
Ddram_port.c27 static struct mv_ddr_topology_map board_topology_map = {
86 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/kobol/helios4/
Dhelios4.c53 static struct mv_ddr_topology_map board_topology_map = {
75 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/Marvell/db-88f6820-amc/
Ddb-88f6820-amc.c54 static struct mv_ddr_topology_map board_topology_map = {
76 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/solidrun/clearfog/
Dclearfog.c52 static struct mv_ddr_topology_map board_topology_map = {
74 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/Marvell/db-88f6820-gp/
Ddb-88f6820-gp.c75 static struct mv_ddr_topology_map board_topology_map = {
97 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/alliedtelesis/x530/
Dx530.c50 static struct mv_ddr_topology_map board_topology_map = {
72 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/gdsys/a38x/
Dcontrolcenterdc.c52 static struct mv_ddr_topology_map ddr_topology_map = {
138 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()
/external/u-boot/board/CZ.NIC/turris_omnia/
Dturris_omnia.c267 static struct mv_ddr_topology_map board_topology_map_1g = {
289 static struct mv_ddr_topology_map board_topology_map_2g = {
311 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get()

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