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/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dpr46759.ll2 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3 ; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4 ; RUN: -check-prefix=CHECK-LE %s
7 ; CHECK-LE-LABEL: foo:
8 ; CHECK-LE: # %bb.0: # %entry
9 ; CHECK-LE-NEXT: std r31, -8(r1)
10 ; CHECK-LE-NEXT: std r30, -16(r1)
11 ; CHECK-LE-NEXT: mr r30, r1
12 ; CHECK-LE-NEXT: .cfi_def_cfa r30, 0
13 ; CHECK-LE-NEXT: clrldi r0, r30, 53
[all …]
Dstack-clash-dynamic-alloca.ll2 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3 ; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4 ; RUN: -check-prefix=CHECK-LE %s
5 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
6 ; RUN: -mtriple=powerpc64le-linux-gnu -mcpu=pwr9 < %s | FileCheck \
7 ; RUN: -check-prefix=CHECK-P9-LE %s
8 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
9 ; RUN: -mtriple=powerpc64-linux-gnu < %s | FileCheck \
10 ; RUN: -check-prefix=CHECK-BE %s
11 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
[all …]
Dp8-scalar_vector_conversions.ll1 ; RUN: llc < %s -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu \
2 ; RUN: -verify-machineinstrs -ppc-asm-full-reg-names -mcpu=pwr8 -relocation-model=pic \
4 ; RUN: llc < %s -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu \
5 ; RUN: -verify-machineinstrs -ppc-asm-full-reg-names -mcpu=pwr8 -relocation-model=pic \
6 ; RUN: | FileCheck %s -check-prefix=CHECK-LE
20 ; CHECK-LABEL: buildc
23 ; CHECK-LE-LABEL: buildc
24 ; CHECK-LE: mtvsrd v2, r3
25 ; CHECK-LE: vspltb v2, v2, 7
34 ; CHECK-LABEL: builds
[all …]
Dpcrel-got-indirect.ll2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
4 ; RUN: | FileCheck %s --check-prefix=LE
5 ; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
6 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
7 ; RUN: | FileCheck %s --check-prefix=BE
23 ; LE-LABEL: ReadGlobalVarChar:
24 ; LE: # %bb.0: # %entry
25 ; LE-NEXT: pld r3, valChar@got@pcrel(0), 1
26 ; LE-NEXT: .Lpcrel:
[all …]
Dstack-clash-prologue.ll2 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3 ; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4 ; RUN: -check-prefix=CHECK-LE %s
5 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
6 ; RUN: -mtriple=powerpc64-linux-gnu < %s | FileCheck \
7 ; RUN: -check-prefix=CHECK-BE %s
8 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
9 ; RUN: -mtriple=powerpc-linux-gnu < %s | FileCheck \
10 ; RUN: -check-prefix=CHECK-32 %s
14 ; CHECK-LE-LABEL: f0:
[all …]
Dvec_extract_p9_2.ll2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-gnu-linux -mcpu=pwr9 < %s | FileCheck…
3 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -mcpu=pwr9 < %s | FileCheck %…
6 ; CHECK-LE-LABEL: test_add1:
7 ; CHECK-LE: # %bb.0: # %entry
8 ; CHECK-LE-NEXT: vextubrx 3, 5, 2
9 ; CHECK-LE-NEXT: add 3, 3, 6
10 ; CHECK-LE-NEXT: clrldi 3, 3, 56
11 ; CHECK-LE-NEXT: blr
12 ; CHECK-BE-LABEL: test_add1:
13 ; CHECK-BE: # %bb.0: # %entry
[all …]
Dpr25080.ll2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- -mcpu=pwr8 < %s | FileCheck %s --check-pref…
3 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr8 < %s | FileCheck %s --check-prefix…
6 ; LE-LABEL: pr25080:
7 ; LE: # %bb.0: # %entry
8 ; LE-NEXT: addis 3, 2, .LCPI0_0@toc@ha
9 ; LE-NEXT: xxlxor 37, 37, 37
10 ; LE-NEXT: addi 3, 3, .LCPI0_0@toc@l
11 ; LE-NEXT: lvx 4, 0, 3
12 ; LE-NEXT: xxland 34, 34, 36
13 ; LE-NEXT: xxland 35, 35, 36
[all …]
Dstack-clash-prologue-nounwind.ll2 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3 ; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4 ; RUN: -check-prefix=CHECK-LE %s
5 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
6 ; RUN: -mtriple=powerpc64-linux-gnu < %s | FileCheck \
7 ; RUN: -check-prefix=CHECK-BE %s
8 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
9 ; RUN: -mtriple=powerpc-linux-gnu < %s | FileCheck \
10 ; RUN: -check-prefix=CHECK-32 %s
14 ; CHECK-LE-LABEL: f0:
[all …]
Dselect.ll2 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3 ; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4 ; RUN: -check-prefix=CHECK-LE %s
5 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
6 ; RUN: -mtriple=powerpc-linux-gnu < %s | FileCheck \
7 ; RUN: -check-prefix=CHECK-32 %s
10 ; CHECK-LE-LABEL: f0:
11 ; CHECK-LE: # %bb.0:
12 ; CHECK-LE-NEXT: li r4, 125
13 ; CHECK-LE-NEXT: cmpdi r3, 0
[all …]
Dvec_extract_p9.ll2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-gnu-linux -mcpu=pwr9 < %s | FileCheck…
3 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -mcpu=pwr9 < %s | FileCheck %…
6 ; CHECK-LE-LABEL: test1:
7 ; CHECK-LE: # %bb.0: # %entry
8 ; CHECK-LE-NEXT: vextubrx 3, 5, 2
9 ; CHECK-LE-NEXT: clrldi 3, 3, 56
10 ; CHECK-LE-NEXT: blr
11 ; CHECK-BE-LABEL: test1:
12 ; CHECK-BE: # %bb.0: # %entry
13 ; CHECK-BE-NEXT: vextublx 3, 5, 2
[all …]
/external/clang/test/CodeGen/
Dbuiltins-ppc-altivec.c1 // REQUIRES: powerpc-registered-target
2 // RUN: %clang_cc1 -faltivec -triple powerpc-unknown-unknown -emit-llvm %s \
3 // RUN: -o - | FileCheck %s
4 // RUN: %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s \
5 // RUN: -o - | FileCheck %s
6 // RUN: %clang_cc1 -faltivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
7 // RUN: -o - | FileCheck %s -check-prefix=CHECK-LE
8 // RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
9 // RUN: -ferror-limit 0 -DNO_ALTIVEC -o - 2>&1 \
10 // RUN: | FileCheck %s -check-prefix=CHECK-NOALTIVEC
[all …]
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-masked-store.ll2 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -…
3 ; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s…
6 ; CHECK-LE-LABEL: masked_v4i32:
7 ; CHECK-LE: @ %bb.0: @ %entry
8 ; CHECK-LE-NEXT: vpt.s32 gt, q0, zr
9 ; CHECK-LE-NEXT: vstrwt.32 q0, [r0]
10 ; CHECK-LE-NEXT: bx lr
12 ; CHECK-BE-LABEL: masked_v4i32:
13 ; CHECK-BE: @ %bb.0: @ %entry
14 ; CHECK-BE-NEXT: vrev64.32 q1, q0
[all …]
Dmve-pred-bitcast.ll2 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | File…
3 ; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | Fi…
6 ; CHECK-LE-LABEL: bitcast_to_v4i1:
7 ; CHECK-LE: @ %bb.0: @ %entry
8 ; CHECK-LE-NEXT: .pad #4
9 ; CHECK-LE-NEXT: sub sp, #4
10 ; CHECK-LE-NEXT: and r0, r0, #15
11 ; CHECK-LE-NEXT: vmov.i8 q1, #0x0
12 ; CHECK-LE-NEXT: vmov.i8 q2, #0xff
13 ; CHECK-LE-NEXT: vmsr p0, r0
[all …]
Dmve-masked-load.ll2 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -…
3 ; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s…
6 ; CHECK-LE-LABEL: masked_v4i32_align4_zero:
7 ; CHECK-LE: @ %bb.0: @ %entry
8 ; CHECK-LE-NEXT: vpt.s32 gt, q0, zr
9 ; CHECK-LE-NEXT: vldrwt.u32 q0, [r0]
10 ; CHECK-LE-NEXT: bx lr
12 ; CHECK-BE-LABEL: masked_v4i32_align4_zero:
13 ; CHECK-BE: @ %bb.0: @ %entry
14 ; CHECK-BE-NEXT: vrev64.32 q1, q0
[all …]
Dmve-pred-loadstore.ll2 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | File…
3 ; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | Fi…
6 ; CHECK-LE-LABEL: load_v4i1:
7 ; CHECK-LE: @ %bb.0: @ %entry
8 ; CHECK-LE-NEXT: ldrb r0, [r0]
9 ; CHECK-LE-NEXT: vmov.i8 q1, #0x0
10 ; CHECK-LE-NEXT: vmov.i8 q2, #0xff
11 ; CHECK-LE-NEXT: vmsr p0, r0
12 ; CHECK-LE-NEXT: vpsel q1, q2, q1
13 ; CHECK-LE-NEXT: vmov.u8 r0, q1[0]
[all …]
Dmve-be.ll2 …: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileChec…
3 …: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCh…
6 ; CHECK-LABEL: load_load_add_store:
8 ; CHECK-NEXT: vldrw.u32 q0, [r1]
9 ; CHECK-NEXT: vldrw.u32 q1, [r0]
10 ; CHECK-NEXT: vadd.i32 q0, q1, q0
11 ; CHECK-NEXT: vstrw.32 q0, [r0]
12 ; CHECK-NEXT: bx lr
22 ; CHECK-LE-LABEL: load_load_add_store_align1:
23 ; CHECK-LE: @ %bb.0: @ %entry
[all …]
/external/llvm-project/clang/test/CodeGen/
Dbuiltins-ppc-altivec.c1 // REQUIRES: powerpc-registered-target
2 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s \
3 // RUN: -flax-vector-conversions=none -o - | FileCheck %s
4 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -emit-llvm %s \
5 // RUN: -flax-vector-conversions=none -o - | FileCheck %s
6 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
7 // RUN: -flax-vector-conversions=none -o - | FileCheck %s -check-prefix=CHECK-LE
8 // RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
9 // RUN: -ferror-limit 0 -DNO_ALTIVEC -o - 2>&1 \
10 // RUN: | FileCheck %s -check-prefix=CHECK-NOALTIVEC
[all …]
Dbuiltins-ppc-vsx.c1 // REQUIRES: powerpc-registered-target
2 // RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx -triple powerpc64-unknown-unknown …
3 …ng_cc1 -target-feature +altivec -target-feature +vsx -triple powerpc64le-unknown-unknown -emit-llv…
8 vector signed char vsc = { -8, 9, -10, 11, -12, 13, -14, 15,
9 -0, 1, -2, 3, -4, 5, -6, 7};
12 vector float vf = { -1.5, 2.5, -3.5, 4.5 };
13 vector double vd = { 3.5, -7.5 };
15 vector signed short vss = { -1, 2, -3, 4, -5, 6, -7, 8 };
18 vector signed int vsi = { -1, 2, -3, 4 };
21 vector signed long long vsll = { 255LL, -937LL };
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dfunc-argpassing-endian.ll2 ; RUN: llc -verify-machineinstrs < %s -mtriple=arm-eabi -mattr=v7,neon | FileCheck %s --check-prefi…
3 ; RUN: llc -verify-machineinstrs < %s -mtriple=armeb-eabi -mattr=v7,neon | FileCheck %s --check-pre…
9 ; CHECK-LE-LABEL: arg_longint:
10 ; CHECK-LE: @ %bb.0:
11 ; CHECK-LE-NEXT: movw r1, :lower16:var32
12 ; CHECK-LE-NEXT: movt r1, :upper16:var32
13 ; CHECK-LE-NEXT: str r0, [r1]
14 ; CHECK-LE-NEXT: bx lr
16 ; CHECK-BE-LABEL: arg_longint:
17 ; CHECK-BE: @ %bb.0:
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dvsx.ll1 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s
2 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck -check-pref…
3 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx -fast-isel -O0 < %s | FileCh…
4 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx -fast-isel -O0 < %s | FileCh…
5 ; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx < %s | FileCheck -check-pr…
12 ; CHECK-LABEL: @test1
16 ; CHECK-LE-LABEL: @test1
17 ; CHECK-LE: xsmuldp 1, 1, 2
18 ; CHECK-LE: blr
26 ; CHECK-LABEL: @test2
[all …]
Dp8-scalar_vector_conversions.ll1 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s
2 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s -check-prefix=CHEC…
19 ; CHECK: sldi [[REG1:[0-9]+]], 3, 56
20 ; CHECK: mtvsrd {{[0-9]+}}, [[REG1]]
21 ; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
22 ; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
34 ; CHECK: sldi [[REG1:[0-9]+]], 3, 48
35 ; CHECK: mtvsrd {{[0-9]+}}, [[REG1]]
36 ; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
37 ; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
[all …]
/external/llvm-project/llvm/test/MC/PowerPC/
Dppc64-encoding-ext.s2 # RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK…
3 # RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHE…
7 # CHECK-BE: beqlr 0 # encoding: [0x4d,0x82,0x00,0x20]
8 # CHECK-LE: beqlr 0 # encoding: [0x20,0x00,0x82,0x4d]
10 # CHECK-BE: beqlr 1 # encoding: [0x4d,0x86,0x00,0x20]
11 # CHECK-LE: beqlr 1 # encoding: [0x20,0x00,0x86,0x4d]
13 # CHECK-BE: beqlr 2 # encoding: [0x4d,0x8a,0x00,0x20]
14 # CHECK-LE: beqlr 2 # encoding: [0x20,0x00,0x8a,0x4d]
16 # CHECK-BE: beqlr 3 # encoding: [0x4d,0x8e,0x00,0x20]
17 # CHECK-LE: beqlr 3 # encoding: [0x20,0x00,0x8e,0x4d]
[all …]
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-ext.s2 # RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK…
3 # RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHE…
7 # CHECK-BE: beqlr 0 # encoding: [0x4d,0x82,0x00,0x20]
8 # CHECK-LE: beqlr 0 # encoding: [0x20,0x00,0x82,0x4d]
10 # CHECK-BE: beqlr 1 # encoding: [0x4d,0x86,0x00,0x20]
11 # CHECK-LE: beqlr 1 # encoding: [0x20,0x00,0x86,0x4d]
13 # CHECK-BE: beqlr 2 # encoding: [0x4d,0x8a,0x00,0x20]
14 # CHECK-LE: beqlr 2 # encoding: [0x20,0x00,0x8a,0x4d]
16 # CHECK-BE: beqlr 3 # encoding: [0x4d,0x8e,0x00,0x20]
17 # CHECK-LE: beqlr 3 # encoding: [0x20,0x00,0x8e,0x4d]
[all …]
/external/libwebsockets/minimal-examples/api-tests/api-test-fts/
Dles-mis-utf8.txt5 re-use it under the terms of the Project Gutenberg License included
34 Tome I--FANTINE
41 Livre premier--Un juste
52 Chapitre IX Le frère raconté par la soeur
60 Livre deuxième--La chute
62 Chapitre I Le soir d'un jour de marche
68 Chapitre VII Le dedans du désespoir
74 Chapitre XIII Petit-Gervais
77 Livre troisième--En l'année 1817
88 Livre quatrième--Confier, c'est quelquefois livrer
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/
Dmulti-use-loads.ll2 ; RUN: llc -O3 -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefixes=CHECK-LE
3 ; RUN: llc -O3 -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefixes=CHECK-…
6 ; CHECK-LE-LABEL: add_user:
7 ; CHECK-LE: @ %bb.0: @ %entry
8 ; CHECK-LE-NEXT: .save {r4, lr}
9 ; CHECK-LE-NEXT: push {r4, lr}
10 ; CHECK-LE-NEXT: cmp r0, #1
11 ; CHECK-LE-NEXT: blt .LBB0_4
12 ; CHECK-LE-NEXT: @ %bb.1: @ %for.body.preheader
13 ; CHECK-LE-NEXT: subs r2, #2
[all …]

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