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Searched refs:Offset64 (Results 1 – 7 of 7) sorted by relevance

/external/llvm-project/llvm/tools/dsymutil/
DDwarfLinkerForBinary.cpp519 uint64_t Offset64 = Reloc.getOffset(); in findValidRelocsMachO() local
525 uint64_t OffsetCopy = Offset64; in findValidRelocsMachO()
552 ValidRelocs.emplace_back(Offset64, RelocSize, Addend, Mapping); in findValidRelocsMachO()
557 ValidRelocs.emplace_back(Offset64, RelocSize, SymOffset, Mapping); in findValidRelocsMachO()
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dpromote-constOffset-to-imm.ll295 define amdgpu_kernel void @Offset64(i8 addrspace(1)* %buffer) {
296 ; GCN-LABEL: Offset64:
/external/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td8297 int Offset64, bits<4> opcode> {
8346 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
8351 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
8356 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
8363 defm : SIMDLdStAliases<asm, "8b", Count, Offset64, 64>;
8364 defm : SIMDLdStAliases<asm, "4h", Count, Offset64, 64>;
8365 defm : SIMDLdStAliases<asm, "2s", Count, Offset64, 64>;
8370 int Offset64, bits<4> opcode> {
8418 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
8423 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
[all …]
/external/llvm/tools/dsymutil/
DDwarfLinker.cpp1931 uint64_t Offset64 = Reloc.getOffset(); in findValidRelocsMachO() local
1936 uint32_t Offset = Offset64; in findValidRelocsMachO()
1962 ValidRelocs.emplace_back(Offset64, RelocSize, Addend, Mapping); in findValidRelocsMachO()
1967 ValidRelocs.emplace_back(Offset64, RelocSize, SymOffset, Mapping); in findValidRelocsMachO()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td9218 int Offset128, int Offset64, bits<4> opcode> {
9267 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9272 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9277 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9284 defm : SIMDLdStAliases<BaseName, asm, "8b", Count, Offset64, 64>;
9285 defm : SIMDLdStAliases<BaseName, asm, "4h", Count, Offset64, 64>;
9286 defm : SIMDLdStAliases<BaseName, asm, "2s", Count, Offset64, 64>;
9291 int Offset128, int Offset64, bits<4> opcode> {
9339 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9344 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
[all …]
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td9616 int Offset128, int Offset64, bits<4> opcode> {
9665 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9670 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9675 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9682 defm : SIMDLdStAliases<BaseName, asm, "8b", Count, Offset64, 64>;
9683 defm : SIMDLdStAliases<BaseName, asm, "4h", Count, Offset64, 64>;
9684 defm : SIMDLdStAliases<BaseName, asm, "2s", Count, Offset64, 64>;
9689 int Offset128, int Offset64, bits<4> opcode> {
9737 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
9742 !cast<RegisterOperand>("GPR64pi" # Offset64):$Xm)>;
[all …]
/external/llvm-project/clang/lib/AST/
DExprConstant.cpp1689 uint64_t Offset64 = Offset.getQuantity(); in adjustOffsetAndIndex() local
1692 Offset = CharUnits::fromQuantity(Offset64 + ElemSize64 * Index64); in adjustOffsetAndIndex()
12305 uint64_t Offset64 = Offset.getQuantity(); in addOrSubLValueAsInteger() local
12307 Offset = CharUnits::fromQuantity(IsSub ? Offset64 - Index64 in addOrSubLValueAsInteger()
12308 : Offset64 + Index64); in addOrSubLValueAsInteger()