/external/capstone/suite/cstest/src/ |
D | tms320c64x_detail.c | 21 add_str(&result, " ; op_count: %u", tms320c64x->op_count); in get_detail_tms320c64x() 29 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_tms320c64x() 32 add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, op->imm); in get_detail_tms320c64x() 35 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_tms320c64x() 37 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_tms320c64x() 38 add_str(&result, " ; operands[%u].mem.disptype: ", i); in get_detail_tms320c64x() 40 add_str(&result, "Invalid"); in get_detail_tms320c64x() 41 add_str(&result, " ; operands[%u].mem.disp: %u", i, op->mem.disp); in get_detail_tms320c64x() 44 add_str(&result, "Constant"); in get_detail_tms320c64x() 45 add_str(&result, " ; operands[%u].mem.disp: %u", i, op->mem.disp); in get_detail_tms320c64x() [all …]
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D | arm_detail.c | 24 add_str(&result, " ; op_count: %u", arm->op_count); in get_detail_arm() 32 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_arm() 35 add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, op->imm); in get_detail_arm() 40 add_str(&result, " ; operands[%u].type: FP = <float_point_unsupported>", i); in get_detail_arm() 42 add_str(&result, " ; operands[%u].type: FP = %f", i, op->fp); in get_detail_arm() 46 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm() 48 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_arm() 50 … add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index)); in get_detail_arm() 52 add_str(&result, " ; operands[%u].mem.scale: %d", i, op->mem.scale); in get_detail_arm() 54 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_arm() [all …]
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D | arm64_detail.c | 25 add_str(&result, " ; op_count: %u", arm64->op_count); in get_detail_arm64() 33 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_arm64() 36 add_str(&result, " ; operands[%u].type: IMM = 0x%" PRIx64 "", i, op->imm); in get_detail_arm64() 41 add_str(&result, " ; operands[%u].type: FP = <float_point_unsupported>", i); in get_detail_arm64() 43 add_str(&result, " ; operands[%u].type: FP = %f", i, op->fp); in get_detail_arm64() 47 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm64() 49 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_arm64() 51 … add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index)); in get_detail_arm64() 53 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_arm64() 57 add_str(&result, " ; operands[%u].type: C-IMM = %u", i, (int)op->imm); in get_detail_arm64() [all …]
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D | x86_detail.c | 11 add_str(result, "%s", comment); in print_string_hex() 13 add_str(result, "0x%02x", *c & 0xff); in print_string_hex() 15 add_str(result, " "); in print_string_hex() 208 add_str(&result, " ; rex: 0x%x", x86->rex); in get_detail_x86() 209 add_str(&result, " ; addr_size: %u", x86->addr_size); in get_detail_x86() 210 add_str(&result, " ; modrm: 0x%x", x86->modrm); in get_detail_x86() 211 add_str(&result, " ; disp: 0x%" PRIx64 "", x86->disp); in get_detail_x86() 214 add_str(&result, " ; sib: 0x%x", x86->sib); in get_detail_x86() 216 add_str(&result, " ; sib_base: %s", cs_reg_name(*ud, x86->sib_base)); in get_detail_x86() 218 add_str(&result, " ; sib_index: %s", cs_reg_name(*ud, x86->sib_index)); in get_detail_x86() [all …]
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D | m680x_detail.c | 16 add_str(&result, "\treading from regs: "); in print_read_write_regs() 20 add_str(&result, ", "); in print_read_write_regs() 22 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_read[i])); in print_read_write_regs() 27 add_str(&result, "\twriting to regs: "); in print_read_write_regs() 31 add_str(&result, ", "); in print_read_write_regs() 33 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_write[i])); in print_read_write_regs() 54 add_str(&result, " ; op_count: %u", m680x->op_count); in get_detail_m680x() 72 …add_str(&result, " ; operands[%u].type: REGISTER = %s%s", i, cs_reg_name(*handle, op->reg), commen… in get_detail_m680x() 76 add_str(&result, " ; operands[%u].type: CONSTANT = %u", i, op->const_val); in get_detail_m680x() 80 add_str(&result, " ; operands[%u].type: IMMEDIATE = #%d", i, op->imm); in get_detail_m680x() [all …]
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D | m68k_detail.c | 44 add_str(&result, " ; reading from reg: %s", reg_name); in print_read_write_regs() 50 add_str(&result, " ; writing to reg: %s", reg_name); in print_read_write_regs() 71 add_str(&result, " ; op_count: %u", m68k->op_count); in get_detail_m68k() 75 add_str(&result, " ; groups_count: %u", detail->groups_count); in get_detail_m68k() 84 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_m68k() 87 add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, (int)op->imm); in get_detail_m68k() 90 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_m68k() 92 … add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base_reg)); in get_detail_m68k() 94 …add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index_reg)… in get_detail_m68k() 95 add_str(&result, " ; operands[%u].mem.index: size = %c", i, op->mem.index_size ? 'l' : 'w'); in get_detail_m68k() [all …]
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D | ppc_detail.c | 50 add_str(&result, " ; op_count: %u", ppc->op_count); in get_detail_ppc() 58 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_ppc() 61 add_str(&result, " ; operands[%u].type: IMM = 0x%"PRIx64"", i, op->imm); in get_detail_ppc() 64 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_ppc() 66 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_ppc() 68 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_ppc() 72 add_str(&result, " ; operands[%u].type: CRX", i); in get_detail_ppc() 73 add_str(&result, " ; operands[%u].crx.scale: %d", i, op->crx.scale); in get_detail_ppc() 74 add_str(&result, " ; operands[%u].crx.reg: %s", i, cs_reg_name(*handle, op->crx.reg)); in get_detail_ppc() 75 add_str(&result, " ; operands[%u].crx.cond: %s", i, get_bc_name(op->crx.cond)); in get_detail_ppc() [all …]
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D | systemz_detail.c | 21 add_str(&result, " ; op_count: %u", sysz->op_count); in get_detail_sysz() 29 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_sysz() 32 add_str(&result, " ; operands[%u].type: ACREG = %u", i, op->reg); in get_detail_sysz() 35 add_str(&result, " ; operands[%u].type: IMM = 0x%" PRIx64 "", i, op->imm); in get_detail_sysz() 38 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_sysz() 40 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_sysz() 42 … add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index)); in get_detail_sysz() 44 add_str(&result, " ; operands[%u].mem.length: 0x%" PRIx64 "", i, op->mem.length); in get_detail_sysz() 46 add_str(&result, " ; operands[%u].mem.disp: 0x%" PRIx64 "", i, op->mem.disp); in get_detail_sysz() 53 add_str(&result, " ; Code condition: %u", sysz->cc); in get_detail_sysz()
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D | sparc_detail.c | 21 add_str(&result, " ; op_count: %u", sparc->op_count); in get_detail_sparc() 29 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_sparc() 32 add_str(&result, " ; operands[%u].type: IMM = 0x%" PRIx64 "", i, op->imm); in get_detail_sparc() 35 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_sparc() 37 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_sparc() 39 … add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index)); in get_detail_sparc() 41 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_sparc() 48 add_str(&result, " ; Code condition: %u", sparc->cc); in get_detail_sparc() 51 add_str(&result, " ; Hint code: %u", sparc->hint); in get_detail_sparc()
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D | xcore_detail.c | 21 add_str(&result, " ; op_count: %u", xcore->op_count); in get_detail_xcore() 29 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_xcore() 32 add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, op->imm); in get_detail_xcore() 35 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_xcore() 37 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_xcore() 39 … add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index)); in get_detail_xcore() 41 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_xcore() 43 add_str(&result, " ; operands[%u].mem.direct: -1", i); in get_detail_xcore()
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D | mips_detail.c | 21 add_str(&result, " ; op_count: %u", mips->op_count); in get_detail_mips() 29 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_mips() 32 add_str(&result, " ; operands[%u].type: IMM = 0x%" PRIx64 "", i, op->imm); in get_detail_mips() 35 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_mips() 37 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base)); in get_detail_mips() 39 add_str(&result, " ; operands[%u].mem.disp: 0x%" PRIx64 "", i, op->mem.disp); in get_detail_mips()
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D | mos65xx_detail.c | 56 add_str(&result, " ; address mode: %s", get_am_name(mos65xx->am)); in get_detail_mos65xx() 57 add_str(&result, " ; modifies flags: %s", mos65xx->modifies_flags ? "true": "false"); in get_detail_mos65xx() 60 add_str(&result, " ; op_count: %u", mos65xx->op_count); in get_detail_mos65xx() 68 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_mos65xx() 71 add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, op->imm); in get_detail_mos65xx() 74 add_str(&result, " ; operands[%u].type: MEM = 0x%x", i, op->mem); in get_detail_mos65xx()
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D | helper.c | 89 void add_str(char **src, const char *format, ...) in add_str() function 136 if (valid == 1) add_str(&result, "%s%llu", tmp_tmp, value); in replace_hex() 137 else add_str(&result, "%s0x", tmp_tmp); in replace_hex() 142 add_str(&result, "%s", tmp); in replace_hex() 191 add_str(&result, "%s%hu", tmp_tmp, tmp_short); in replace_negative() 194 add_str(&result, "%s%u", tmp_tmp, tmp_int); in replace_negative() 197 add_str(&result, "%s%lu", tmp_tmp, tmp_long); in replace_negative() 200 else add_str(&result, "%s-", tmp_tmp); in replace_negative() 207 add_str(&result, "%s", tmp); in replace_negative()
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D | evm_detail.c | 21 add_str(&result, " ; Pop: %u", evm->pop); in get_detail_evm() 24 add_str(&result, " ; Push: %u", evm->push); in get_detail_evm() 27 add_str(&result, " ; Gas fee: %u", evm->fee); in get_detail_evm()
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D | capstone_test.c | 316 add_str(&cs_result, "%s", tmp); in test_single_issue() 322 add_str(&cs_result, "%s", tmp); in test_single_issue() 326 add_str(&cs_result, " ; Groups: "); in test_single_issue() 328 add_str(&cs_result, "%s ", cs_group_name(*handle, insn->detail->groups[j])); in test_single_issue() 334 add_str(&cs_result, " ;"); in test_single_issue() 345 add_str(&tmptmp, "%s", list_part_issue_result[i]); in test_single_issue() 346 add_str(&tmptmp, " ;"); in test_single_issue()
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/external/rust/crates/grpcio/src/ |
D | metadata.rs | 72 pub fn add_str(&mut self, key: &str, value: &str) -> Result<&mut MetadataBuilder> { in add_str() method 285 assert!(builder.add_str("key-bin", "value").is_err()); in test_key_check() 289 assert!(builder.add_str("", "value").is_err()); in test_key_check() 291 assert!(builder.add_str(":key", "value").is_err()); in test_key_check() 292 assert!(builder.add_str("key~", "value").is_err()); in test_key_check() 293 assert!(builder.add_str("ke+y", "value").is_err()); in test_key_check() 295 assert!(builder.add_str("key", "❤").is_err()); in test_key_check() 296 assert!(builder.add_str("key", "\0").is_err()); in test_key_check() 297 assert!(builder.add_str("key", "\n").is_err()); in test_key_check() 299 builder.add_str("key", "value").unwrap(); in test_key_check() [all …]
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/external/wpa_supplicant_8/src/utils/ |
D | xml_libxml2.c | 31 static void add_str(void *ctx_ptr, const char *fmt, ...) in add_str() function 80 xmlSchemaSetParserErrors(pctx, (xmlSchemaValidityErrorFunc) add_str, in xml_validate() 81 (xmlSchemaValidityWarningFunc) add_str, in xml_validate() 87 xmlSchemaSetValidErrors(vctx, (xmlSchemaValidityErrorFunc) add_str, in xml_validate() 88 (xmlSchemaValidityWarningFunc) add_str, in xml_validate() 148 vctx.error = add_str; in xml_validate_dtd() 149 vctx.warning = add_str; in xml_validate_dtd()
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
D | radeon_compiler_util_tests.c | 42 const char * add_str, in test_rc_inst_can_use_presub() argument 49 init_rc_normal_instruction(&add_inst, add_str); in test_rc_inst_can_use_presub()
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/external/capstone/suite/cstest/include/ |
D | helper.h | 23 void add_str(char **src, const char *format, ...);
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/external/perfetto/test/stress_test/ |
D | stress_producer.cc | 178 payload->add_str(buf); in FillPayload() 188 payload->add_str(buf); in FillPayload()
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/external/llvm-project/llvm/test/CodeGen/Generic/ |
D | print-arith-fp.ll | 4 @add_str = internal constant [12 x i8] c"a + b = %f\0A\00" ; <[12 x i8]*> [#uses=1] 32 %add_s = getelementptr [12 x i8], [12 x i8]* @add_str, i64 0, i64 0 ; <i8*> [#uses=1]
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/external/llvm/test/CodeGen/Generic/ |
D | print-arith-fp.ll | 4 @add_str = internal constant [12 x i8] c"a + b = %f\0A\00" ; <[12 x i8]*> [#uses=1] 32 %add_s = getelementptr [12 x i8], [12 x i8]* @add_str, i64 0, i64 0 ; <i8*> [#uses=1]
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/external/llvm/test/CodeGen/Hexagon/ |
D | i8_VarArg.ll | 6 @add_str = internal constant [12 x i8] c"a + b = %f\0A\00"
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D | i16_VarArg.ll | 6 @add_str = internal constant [12 x i8] c"a + b = %f\0A\00"
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D | i1_VarArg.ll | 6 @add_str = internal constant [12 x i8] c"a + b = %f\0A\00"
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