| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | callee-saved-fpr32s.ll | 27 ; ILP32-NEXT: flw ft0, %lo(var)(a0)
28 ; ILP32-NEXT: flw ft1, %lo(var+4)(a0)
29 ; ILP32-NEXT: flw ft2, %lo(var+8)(a0)
30 ; ILP32-NEXT: flw ft3, %lo(var+12)(a0)
32 ; ILP32-NEXT: flw ft4, 16(a1)
33 ; ILP32-NEXT: flw ft5, 20(a1)
34 ; ILP32-NEXT: flw ft6, 24(a1)
35 ; ILP32-NEXT: flw ft7, 28(a1)
36 ; ILP32-NEXT: flw fa0, 32(a1)
37 ; ILP32-NEXT: flw fa1, 36(a1)
[all …]
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| D | fastcc-float.ll | 21 ; CHECK-NEXT: flw fa0, 0(a0)
22 ; CHECK-NEXT: flw fa1, 4(a0)
23 ; CHECK-NEXT: flw fa2, 8(a0)
24 ; CHECK-NEXT: flw fa3, 12(a0)
25 ; CHECK-NEXT: flw fa4, 16(a0)
26 ; CHECK-NEXT: flw fa5, 20(a0)
27 ; CHECK-NEXT: flw fa6, 24(a0)
28 ; CHECK-NEXT: flw fa7, 28(a0)
29 ; CHECK-NEXT: flw ft0, 32(a0)
30 ; CHECK-NEXT: flw ft1, 36(a0)
[all …]
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| D | interrupt-attr.ll | 145 ; CHECK-RV32-F-NEXT: flw fs11, 0(sp)
146 ; CHECK-RV32-F-NEXT: flw fs10, 4(sp)
147 ; CHECK-RV32-F-NEXT: flw fs9, 8(sp)
148 ; CHECK-RV32-F-NEXT: flw fs8, 12(sp)
149 ; CHECK-RV32-F-NEXT: flw fs7, 16(sp)
150 ; CHECK-RV32-F-NEXT: flw fs6, 20(sp)
151 ; CHECK-RV32-F-NEXT: flw fs5, 24(sp)
152 ; CHECK-RV32-F-NEXT: flw fs4, 28(sp)
153 ; CHECK-RV32-F-NEXT: flw fs3, 32(sp)
154 ; CHECK-RV32-F-NEXT: flw fs2, 36(sp)
[all …]
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| D | interrupt-attr-nocall.ll | 217 ; CHECK-RV32IF-NEXT: flw ft0, %lo(e)(a0)
219 ; CHECK-RV32IF-NEXT: flw ft1, %lo(f)(a0)
223 ; CHECK-RV32IF-NEXT: flw ft1, 4(sp)
224 ; CHECK-RV32IF-NEXT: flw ft0, 8(sp)
236 ; CHECK-RV32IFD-NEXT: flw ft0, %lo(e)(a0)
238 ; CHECK-RV32IFD-NEXT: flw ft1, %lo(f)(a0)
316 ; CHECK-RV32IF-NEXT: flw ft0, %lo(e)(a0)
318 ; CHECK-RV32IF-NEXT: flw ft1, %lo(f)(a0)
322 ; CHECK-RV32IF-NEXT: flw ft1, 12(sp)
323 ; CHECK-RV32IF-NEXT: flw ft0, 16(sp)
[all …]
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| D | float-mem.ll | 7 define float @flw(float *%a) nounwind {
8 ; RV32IF-LABEL: flw:
10 ; RV32IF-NEXT: flw ft0, 0(a0)
11 ; RV32IF-NEXT: flw ft1, 12(a0)
16 ; RV64IF-LABEL: flw:
18 ; RV64IF-NEXT: flw ft0, 0(a0)
19 ; RV64IF-NEXT: flw ft1, 12(a0)
26 ; Use both loaded values in an FP op to ensure an flw is used, even for the
71 ; RV32IF-NEXT: flw ft1, %lo(G)(a0)
74 ; RV32IF-NEXT: flw ft1, 36(a1)
[all …]
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| D | calling-conv-ilp32f-ilp32d-common.ll | 29 ; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI1_0)(a0)
59 ; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI3_0)(a0)
99 ; RV32-ILP32FD-NEXT: flw fa0, %lo(.LCPI5_0)(a0)
101 ; RV32-ILP32FD-NEXT: flw fa1, %lo(.LCPI5_1)(a0)
103 ; RV32-ILP32FD-NEXT: flw fa2, %lo(.LCPI5_2)(a0)
105 ; RV32-ILP32FD-NEXT: flw fa3, %lo(.LCPI5_3)(a0)
107 ; RV32-ILP32FD-NEXT: flw fa4, %lo(.LCPI5_4)(a0)
109 ; RV32-ILP32FD-NEXT: flw fa5, %lo(.LCPI5_5)(a0)
111 ; RV32-ILP32FD-NEXT: flw fa6, %lo(.LCPI5_6)(a0)
113 ; RV32-ILP32FD-NEXT: flw fa7, %lo(.LCPI5_7)(a0)
[all …]
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| D | inline-asm-f-abi-names.ll | 349 ; RV32IF-NEXT: flw fs0, 12(sp)
361 ; RV64IF-NEXT: flw fs0, 12(sp)
378 ; RV32IF-NEXT: flw fs0, 12(sp)
390 ; RV64IF-NEXT: flw fs0, 12(sp)
407 ; RV32IF-NEXT: flw fs1, 12(sp)
419 ; RV64IF-NEXT: flw fs1, 12(sp)
436 ; RV32IF-NEXT: flw fs1, 12(sp)
448 ; RV64IF-NEXT: flw fs1, 12(sp)
781 ; RV32IF-NEXT: flw fs2, 12(sp)
793 ; RV64IF-NEXT: flw fs2, 12(sp)
[all …]
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| D | inline-asm-f-constraint-f.ll | 13 ; RV32F-NEXT: flw ft0, %lo(gf)(a1)
24 ; RV64F-NEXT: flw ft0, %lo(gf)(a1)
40 ; RV32F-NEXT: flw fs0, %lo(gf)(a1)
51 ; RV64F-NEXT: flw fs0, %lo(gf)(a1)
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| D | float-imm.ll | 18 ; RV64IF-NEXT: flw ft0, %lo(.LCPI0_0)(a0)
28 ; RV32IF-NEXT: flw ft0, %lo(.LCPI1_0)(a1)
37 ; RV64IF-NEXT: flw ft0, %lo(.LCPI1_0)(a1)
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| D | ghccc-rv32.ll | 48 ; CHECK-NEXT: flw fs5, %lo(f6)(a0)
50 ; CHECK-NEXT: flw fs4, %lo(f5)(a0)
52 ; CHECK-NEXT: flw fs3, %lo(f4)(a0)
54 ; CHECK-NEXT: flw fs2, %lo(f3)(a0)
56 ; CHECK-NEXT: flw fs1, %lo(f2)(a0)
58 ; CHECK-NEXT: flw fs0, %lo(f1)(a0)
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| D | ghccc-rv64.ll | 48 ; CHECK-NEXT: flw fs5, %lo(f6)(a0)
50 ; CHECK-NEXT: flw fs4, %lo(f5)(a0)
52 ; CHECK-NEXT: flw fs3, %lo(f4)(a0)
54 ; CHECK-NEXT: flw fs2, %lo(f3)(a0)
56 ; CHECK-NEXT: flw fs1, %lo(f2)(a0)
58 ; CHECK-NEXT: flw fs0, %lo(f1)(a0)
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| D | fp-imm.ll | 38 ; RV32F-NEXT: flw fa0, %lo(.LCPI1_0)(a0)
44 ; RV32D-NEXT: flw fa0, %lo(.LCPI1_0)(a0)
50 ; RV64F-NEXT: flw fa0, %lo(.LCPI1_0)(a0)
56 ; RV64D-NEXT: flw fa0, %lo(.LCPI1_0)(a0)
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| D | select-const.ll | 151 ; RV32IF-NEXT: flw ft0, %lo(.LCPI4_0)(a0)
156 ; RV32IF-NEXT: flw ft0, %lo(.LCPI4_1)(a0)
175 ; RV64IFD-NEXT: flw ft0, %lo(.LCPI4_0)(a0)
180 ; RV64IFD-NEXT: flw ft0, %lo(.LCPI4_1)(a0)
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| D | calling-conv-rv32f-ilp32.ll | 21 ; RV32IF-NEXT: flw ft0, 4(sp)
22 ; RV32IF-NEXT: flw ft1, 0(sp)
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| D | codemodel-lowering.ll | 131 ; RV32I-SMALL-NEXT: flw ft0, %lo(.LCPI3_0)(a1)
142 ; RV32I-MEDIUM-NEXT: flw ft0, 0(a1)
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| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | compress-rv32f.s | 13 flw ft0, 124(sp) label
15 # CHECK-ALIAS: flw ft0, 124(sp)
23 flw fs0, 124(s0) label
25 # CHECK-ALIAS: flw fs0, 124(s0)
26 # CHECK-INST: c.flw fs0, 124(s0)
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| D | rv32f-valid.s | 12 # CHECK-ASM-AND-OBJ: flw ft0, 12(a0)
14 flw f0, 12(a0) label
15 # CHECK-ASM-AND-OBJ: flw ft1, 4(ra)
17 flw f1, +4(ra) label
18 # CHECK-ASM-AND-OBJ: flw ft2, -2048(a3)
20 flw f2, -2048(x13) label
21 # CHECK-ASM-AND-OBJ: flw ft3, -2048(s1)
23 flw f3, %lo(2048)(s1) label
24 # CHECK-ASM-AND-OBJ: flw ft4, 2047(s2)
26 flw f4, 2047(s2) label
[all …]
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| D | rv32f-invalid.s | 5 flw ft1, -2049(a0) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tpre… label
9 flw ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction label
13 flw ft15, 100(a0) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction label
14 flw ft1, 100(a10) # CHECK: :[[@LINE]]:14: error: expected register label
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| D | rvf-pseudos.s | 6 # CHECK: flw fa2, %pcrel_lo(.Lpcrel_hi0)(a2)
7 flw fa2, a_symbol, a2 label
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| D | rv32fc-aliases-valid.s | 7 # CHECK-EXPAND: c.flw fs0, 0(s1)
8 c.flw f8, (x9)
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| D | rv32fc-invalid.s | 4 c.flw ft3, 8(a5) # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
11 c.flw fs0, -4(sp) # CHECK: :[[@LINE]]:13: error: immediate must be a multiple of 4 bytes in the ra…
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| D | invalid-instruction-spellcheck.s | 20 # CHECK-RV32IF: did you mean: flw, la, lb, lh, li, lw
22 # CHECK-RV64IF: did you mean: flw, la, lb, ld, lh, li, lw
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| D | rvf-aliases-valid.s | 26 # TODO flw
109 # CHECK-INST: flw ft0, 0(a0)
110 # CHECK-ALIAS: flw ft0, 0(a0)
111 flw f0, (x10) label
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| D | rv32fc-valid.s | 32 # CHECK-ASM-AND-OBJ: c.flw fa3, 124(a5)
37 c.flw fa3, 124(a5)
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| D | rv32c-fuzzed-invalid.s | 14 c.flw f15,x14,x0 # CHECK: error: immediate must be a multiple of 4 bytes in the range [0, 124]
|