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/external/llvm/test/CodeGen/AMDGPU/
D	global_atomics_i64.ll	1 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s \| FileCheck -check-prefix=GCN -ch… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s \| FileCheck -check-prefix=GCN -chec… 4 ; GCN-LABEL: {{^}}atomic_add_i64_offset: 5 ; GCN: buffer_atomic_add_x2 v{{\[[0-9]+:[0-9]+\]}}, off, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32{{$}} 6 define void @atomic_add_i64_offset(i64 addrspace(1)* %out, i64 %in) { 8 %gep = getelementptr i64, i64 addrspace(1)* %out, i64 4 9 %tmp0 = atomicrmw volatile add i64 addrspace(1)* %gep, i64 %in seq_cst 13 ; GCN-LABEL: {{^}}atomic_add_i64_ret_offset: 14 ; GCN: buffer_atomic_add_x2 [[RET:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:32 … 16 define void @atomic_add_i64_ret_offset(i64 addrspace(1)* %out, i64 addrspace(1)* %out2, i64 %in) { [all …]
D	global_atomics.ll	1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s \| FileCheck -check-prefix=GCN -check-prefix=SI … 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s \| FileCheck -check-prefix=GCN -chec… 4 ; FUNC-LABEL: {{^}}atomic_add_i32_offset: 5 ; GCN: buffer_atomic_add v{{[0-9]+}}, off, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:16{{$}} 6 define void @atomic_add_i32_offset(i32 addrspace(1)* %out, i32 %in) { 8 %gep = getelementptr i32, i32 addrspace(1)* %out, i64 4 9 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 %in seq_cst 13 ; FUNC-LABEL: {{^}}atomic_add_i32_soffset: 14 ; GCN: s_mov_b32 [[SREG:s[0-9]+]], 0x8ca0 15 ; GCN: buffer_atomic_add v{{[0-9]+}}, off, s[{{[0-9]+}}:{{[0-9]+}}], [[SREG]]{{$}} [all …]
D	fma-combine.ll	1 …RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast < %s \| FileCheck -chec… 2 … RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs -fp-contract=fast < %s \| FileCheck -chec… 9 ; (fadd (fmul x, y), z) -> (fma x, y, z) 10 ; FUNC-LABEL: {{^}}combine_to_fma_f64_0: 11 ; SI-DAG: buffer_load_dwordx2 [[A:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\… 12 ; SI-DAG: buffer_load_dwordx2 [[B:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\… 13 ; SI-DAG: buffer_load_dwordx2 [[C:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\… 14 ; SI: v_fma_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[C]] 16 …fine void @combine_to_fma_f64_0(double addrspace(1)* noalias %out, double addrspace(1)* noalias %i… 18 %gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid [all …]
D	mad-combine.ll	1 ; Make sure we still form mad even when unsafe math or fp-contract is allowed instead of fma. 3 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s \| FileCheck -check-prefix=SI -chec… 4 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast < %s \| FileCheck -che… 5 …RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -enable-unsafe-fp-math < %s \| FileCheck … 8 …-march=amdgcn -mcpu=tahiti -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s \| F… 9 …-march=amdgcn -mcpu=verde -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s \| Fi… 16 ; (fadd (fmul x, y), z) -> (fma x, y, z) 17 ; FUNC-LABEL: {{^}}combine_to_mad_f32_0: 18 ; SI-DAG: buffer_load_dword [[A:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64… 19 ; SI-DAG: buffer_load_dword [[B:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64… [all …]
D	shl.ll	1 ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs \| FileCheck -check-prefix=GCN -chec… 2 ; XUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs \| FileCheck -check-prefix=GCN -chec… 3 ; RUN: llc < %s -march=r600 -mcpu=redwood \| FileCheck --check-prefix=EG %s 9 ;EG: LSHL {{\? }}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 10 ;EG: LSHL {{\? }}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 13 ;SI: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 14 ;SI: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 17 ;VI: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 18 ;VI: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 20 define void @shl_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { [all …]
D	fsub64.ll	1 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s \| FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s \| FileCheck -check-prefix=SI %s 6 ; SI-LABEL: {{^}}fsub_f64: 7 ; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\]}} 8 define void @fsub_f64(double addrspace(1)* %out, double addrspace(1)* %in1, 9 double addrspace(1)* %in2) { 10 %r0 = load double, double addrspace(1)* %in1 11 %r1 = load double, double addrspace(1)* %in2 13 store double %r2, double addrspace(1)* %out 17 ; SI-LABEL: {{^}}fsub_fabs_f64: [all …]
D	llvm.amdgcn.div.scale.ll	1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s \| FileCheck -check-prefix=SI %s 8 ; SI-LABEL: {{^}}test_div_scale_f32_1: 9 ; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 10 ; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64… 11 ; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] 14 define void @test_div_scale_f32_1(float addrspace(1)* %out, float addrspace(1)* %in) nounwind { 16 %gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid 17 %gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1 19 %a = load volatile float, float addrspace(1)* %gep.0, align 4 20 %b = load volatile float, float addrspace(1)* %gep.1, align 4 [all …]
D	imm.ll	1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s \| FileCheck -check-prefix=SI -check… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s \| FileCheck -check-prefix=VI -check… 4 ; Use a 64-bit value with lo bits that can be represented as an inline constant 5 ; CHECK-LABEL: {{^}}i64_imm_inline_lo: 6 ; CHECK: v_mov_b32_e32 v[[LO_VGPR:[0-9]+]], 5 8 define void @i64_imm_inline_lo(i64 addrspace(1) %out) { 10 store i64 1311768464867721221, i64 addrspace(1) %out ; 0x1234567800000005 14 ; Use a 64-bit value with hi bits that can be represented as an inline constant 15 ; CHECK-LABEL: {{^}}i64_imm_inline_hi: 16 ; CHECK: v_mov_b32_e32 v[[HI_VGPR:[0-9]+]], 5 [all …]
/external/conscrypt/repackaged/common/src/main/java/com/android/org/conscrypt/
D	AddressUtils.java	9 * http://www.apache.org/licenses/LICENSE-2.0 29 private static final String IP_PATTERN = "^(?:(?:(?:25[0-5]\|2[0-4][0-9]\|[01]?[0-9]?[0-9])\\.){" 30 + "3}(?:25[0-5]\|2[0-4][0-9]\|[01]?[0-9]?[0-9]))\|" 31 + "(?i:(?:(?:[0-9a-f]{1,4}:){7}(?:[0-9a-f]{1,4}\|:))\|(?:(?:[0-9a-f]{1,4}:){6}(?::[0-9a-" 32 + "f]{1,4}\|(?:(?:25[0-5]\|2[0-4][0-9]\|1[0-9][0-9]\|[1-9]?[0-9])(?:\\.(?:25[0-5]\|2[0-4][" 33 + "0-9]\|1[0-9][0-9]\|[1-9]?[0-9])){3})\|:))\|(?:(?:[0-9a-f]{1,4}:){5}(?:(?:(?::[0-9a-f]{" 34 + "1,4}){1,2})\|:(?:(?:25[0-5]\|2[0-4][0-9]\|1[0-9][0-9]\|[1-9]?[0-9])(?:\\.(?:25[0-5]\|2[" 35 + "0-4][0-9]\|1[0-9][0-9]\|[1-9]?[0-9])){3})\|:))\|(?:(?:[0-9a-f]{1,4}:){4}(?:(?:(?::[0-" 36 + "9a-f]{1,4}){1,3})\|(?:(?::[0-9a-f]{1,4})?:(?:(?:25[0-5]\|2[0-4][0-9]\|1[0-9][0-9]\|[1-" 37 + "9]?[0-9])(?:\\.(?:25[0-5]\|2[0-4][0-9]\|1[0-9][0-9]\|[1-9]?[0-9])){3}))\|:))\|(?:(?:[0-" [all …]
/external/conscrypt/common/src/main/java/org/conscrypt/
D	AddressUtils.java	`8 * http://www.apache.org/licenses/LICENSE-2.0 28 …l String IP_PATTERN = "^(?:(?:(?:25[0-5]\|2[0-4][0-9]\|[01]?[0-9]?[0-9])\\.){3}(?:25[0-5]\|2[0-4][0-9… 29 …-9a-f]{1,4}:){7}(?:[0-9a-f]{1,4}\|:))\|(?:(?:[0-9a-f]{1,4}:){6}(?::[0-9a-f]{1,4}\|(?:(?:25[0-5]\|2[0-4… 45 \|\| sniHostname.indexOf('.') != -1) in isValidSniHostname() 48 && sniHostname.indexOf('\0') == -1; in isValidSniHostname() 55 /* This is here for backwards compatibility for pre-Honeycomb devices. */ in isLiteralIpAddress()`
/external/cronet/tot/third_party/icu/source/test/testdata/
D	regextst.txt	`3 # Copyright (c) 2001-2015 International Business Machines 24 # s dot-matches-all mode 25 # m multi-line mode. 26 # ($ and ^ match at embedded new-lines) 27 # D Unix Lines mode (only recognize 0x0a as new-line) 34 # 2-9 a digit between 2 and 9, specifies the number of 42 # a Use non-Anchoring Bounds. 53 # Look-ahead expressions 55 "(?!0{5})(\d{5})" "<0><1>00001</1></0>zzzz" 56 "(?!0{5})(\d{5})z" "<0><1>00001</1>z</0>zzz" [all …]`
/external/cronet/stable/third_party/icu/source/test/testdata/
D	regextst.txt	`3 # Copyright (c) 2001-2015 International Business Machines 24 # s dot-matches-all mode 25 # m multi-line mode. 26 # ($ and ^ match at embedded new-lines) 27 # D Unix Lines mode (only recognize 0x0a as new-line) 34 # 2-9 a digit between 2 and 9, specifies the number of 42 # a Use non-Anchoring Bounds. 53 # Look-ahead expressions 55 "(?!0{5})(\d{5})" "<0><1>00001</1></0>zzzz" 56 "(?!0{5})(\d{5})z" "<0><1>00001</1>z</0>zzz" [all …]`
/external/icu/icu4c/source/test/testdata/
D	regextst.txt	`3 # Copyright (c) 2001-2015 International Business Machines 24 # s dot-matches-all mode 25 # m multi-line mode. 26 # ($ and ^ match at embedded new-lines) 27 # D Unix Lines mode (only recognize 0x0a as new-line) 34 # 2-9 a digit between 2 and 9, specifies the number of 42 # a Use non-Anchoring Bounds. 53 # Look-ahead expressions 55 "(?!0{5})(\d{5})" "<0><1>00001</1></0>zzzz" 56 "(?!0{5})(\d{5})z" "<0><1>00001</1>z</0>zzz" [all …]`
/external/python/dateutil/dateutil/test/
D	test_rrule.py	`1 # -- coding: utf-8 -- 40 dtstart=datetime(1997, 9, 2, 9, 0))), 52 dtstart=datetime(1997, 9, 2, 9, 0))), 53 [datetime(1997, 9, 2, 9, 0), 54 datetime(1998, 9, 2, 9, 0), 55 datetime(1999, 9, 2, 9, 0)]) 61 dtstart=datetime(1997, 9, 2, 9, 0))), 62 [datetime(1997, 9, 2, 9, 0), 63 datetime(1999, 9, 2, 9, 0), 64 datetime(2001, 9, 2, 9, 0)]) [all …]`
/external/tensorflow/tensorflow/lite/delegates/gpu/common/tasks/
D	cumsum_test_util.cc	7 http://www.apache.org/licenses/LICENSE-2.0 30 BHWC shape = BHWC(1, 8, 6, 4); in CumsumHWC() 32 7, -3, -5, 8, 1, 4, 7, 1, 4, -9, 6, -5, 9, -1, 5, 3, -6, -2, in CumsumHWC() 33 -3, 3, -1, -8, -9, -1, 2, 3, 8, -4, -9, -2, 7, 8, 6, 9, 1, -1, in CumsumHWC() 34 -9, -6, -9, 1, -5, 3, 3, 9, 7, 6, -6, -9, 4, -9, -6, -7, 6, -5, in CumsumHWC() 35 -8, 4, 4, 5, -6, -1, 9, -3, 3, 9, 7, 4, -6, -5, -2, 7, -6, -5, in CumsumHWC() 36 -9, 0, -7, -3, -3, 6, -6, -2, -4, 4, 2, -2, 0, -6, -4, 5, -6, -3, in CumsumHWC() 37 1, -6, 0, 5, -2, -8, 6, 4, -6, -5, 8, 3, -5, -2, -9, -4, 5, -2, in CumsumHWC() 38 -7, -7, -6, 1, 5, 2, 9, 1, -2, 9, 1, -2, 6, -5, -3, -6, 3, 7, in CumsumHWC() 39 5, -6, 6, 3, -3, 4, 6, 8, 7, -3, 3, -3, 3, -4, -1, -4, -7, -4, in CumsumHWC() [all …]
/external/chromium-trace/catapult/third_party/polymer/components/iron-icons/
D	hardware-icons.html	1 <!-- 9 --> 11 <link rel="import" href="../iron-icon/iron-icon.html"> 12 <link rel="import" href="../iron-iconset-svg/iron-iconset-svg.html"> 13 <iron-iconset-svg name="hardware" size="24"> 15 …-1.1 0-2 .9-2 2v3h2V5h18v14h-7v2h7c1.1 0 2-.9 2-2V5c0-1.1-.9-2-2-2zM1 18v3h3c0-1.66-1.34-3-3-3zm0-… 16 …-connected"><path d="M1 18v3h3c0-1.66-1.34-3-3-3zm0-4v2c2.76 0 5 2.24 5 5h2c0-3.87-3.13-7-7-7zm18-… 17 …g id="computer"><path d="M20 18c1.1 0 1.99-.9 1.99-2L22 6c0-1.1-.9-2-2-2H4c-1.1 0-2 .9-2 2v10c0 1.… 18 <g id="desktop-mac"><path d="M21 2H3c-1.1 0-2 .9-2 2v12c0 1.1.9 2 2 2h7l-2 3v1h8v-1l-2-3h7c1.1 0 2-… 19 <g id="desktop-windows"><path d="M21 2H3c-1.1 0-2 .9-2 2v12c0 1.1.9 2 2 2h7v2H8v2h8v-2h-2v-2h7c1.1 … [all …]
D	image-icons.html	1 <!-- 9 --> 11 <link rel="import" href="../iron-icon/iron-icon.html"> 12 <link rel="import" href="../iron-iconset-svg/iron-iconset-svg.html"> 13 <iron-iconset-svg name="image" size="24"> 15 …-a-photo"><path d="M3 4V1h2v3h3v2H5v3H3V6H0V4h3zm3 6V7h3V4h7l1.83 2H21c1.1 0 2 .9 2 2v12c0 1.1-.9 … 16 …add-to-photos"><path d="M4 6H2v14c0 1.1.9 2 2 2h14v-2H4V6zm16-4H8c-1.1 0-2 .9-2 2v12c0 1.1.9 2 2 2… 17 …9 10 10 10 10-4.49 10-10S17.51 2 12 2zm0 18c-4.41 0-8-3.59-8-8s3.59-8 8-8 8 3.59 8 8-3.59 8-8 8zm3… 18 …2H5c-1.1 0-2 .9-2 2v14c0 1.1.9 2 2 2h4l3 3 3-3h4c1.1 0 2-.9 2-2V4c0-1.1-.9-2-2-2zm-5.12 10.88L12 1… 19 <g id="assistant-photo"><path d="M14.4 6L14 4H5v17h2v-7h5.6l.4 2h7V6z"/></g> [all …]
/external/llvm/test/CodeGen/AArch64/
D	fast-isel-shift.ll	`1 ; RUN: llc -fast-isel -fast-isel-abort=1 -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s \|… 3 ; CHECK-LABEL: asr_zext_i1_i16 4 ; CHECK: uxth {{w[0-9]}}, wzr 6 %1 = zext i1 %b to i16 7 %2 = ashr i16 %1, 1 11 ; CHECK-LABEL: asr_sext_i1_i16 12 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]}}, #0, #1 13 ; CHECK-NEXT: sxth {{w[0-9]*}}, [[REG1]] 15 %1 = sext i1 %b to i16 16 %2 = ashr i16 %1, 1 [all …]`
D	arm64-neon-add-sub.ll	1 ; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -aarch64-simd-scal… 4 ;CHECK: add {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 10 ;CHECK: add {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 16 ;CHECK: add {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 22 ;CHECK: add {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 28 ;CHECK: add {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 34 ;CHECK: add {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 40 ;CHECK: add {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 46 ;CHECK: fadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 52 ;CHECK: fadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s [all …]
/external/swiftshader/third_party/subzero/crosstest/
D	test_vector_ops.cpp	1 //===- subzero/crosstest/test_vector_ops.cpp - Vector tests ------ C++ --===// 8 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 28 X(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) \ 36 X(9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9) \ 60 X(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16) \ 61 X(2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17) \ 62 X(3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18) \ 63 X(4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19) \ 64 X(5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20) \ [all …]
/external/tensorflow/tensorflow/compiler/xla/service/gpu/
D	cudnn_fused_conv_rewriter_test.cc	7 http://www.apache.org/licenses/LICENSE-2.0 73 auto result = backend().compiler()->RunHloPasses( in GetOptimizedHlo() 83 return (*result)->ToString(print_opts); in GetOptimizedHlo() 138 zeros = TYPE[1,32,9,9] broadcast(zero), dimensions={} in TEST_F() 140 input = TYPE[1,17,9,9] parameter(0) in TEST_F() 141 filter = TYPE[3,3,17,32] parameter(1) in TEST_F() 143 …conv = TYPE[1,32,9,9] convolution(input, filter), window={size=3x3 pad=1_1x1_1}, dim_labels=bf01_0… in TEST_F() 144 ROOT relu = TYPE[1,32,9,9] maximum(zeros, conv) in TEST_F() 155 zeros = TYPE[1,3,3,64] broadcast(zero), dimensions={} in TEST_F() 157 input = TYPE[1,3,3,64] parameter(0) in TEST_F() [all …]
/external/rust/android-crates-io/crates/icu_collections/tests/data/cpt/
D	set3-initial-9.small16.toml	`4 # file name: set3-initial-9.small16 6 # machine-generated by: ucptrietest.c 9 name = "set3-initial-9.small16" 37 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 38 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 39 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 40 9,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 41 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 42 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 43 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, [all …]`
/external/cronet/tot/third_party/icu/source/test/testdata/codepointtrie/
D	set3-initial-9.small16.toml	`4 # file name: set3-initial-9.small16 6 # machine-generated by: ucptrietest.c 9 name = "set3-initial-9.small16" 37 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 38 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 39 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 40 9,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 41 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 42 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 43 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, [all …]`
/external/icu/icu4c/source/test/testdata/codepointtrie/
D	set3-initial-9.small16.toml	`4 # file name: set3-initial-9.small16 6 # machine-generated by: ucptrietest.c 9 name = "set3-initial-9.small16" 37 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 38 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 39 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 40 9,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 41 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 42 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 43 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, [all …]`
/external/cronet/stable/third_party/icu/source/test/testdata/codepointtrie/
D	set3-initial-9.small16.toml	`4 # file name: set3-initial-9.small16 6 # machine-generated by: ucptrietest.c 9 name = "set3-initial-9.small16" 37 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 38 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 39 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9, 40 9,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 41 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 42 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, 43 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, [all …]`

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