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Searched refs:getDesc (Results 1 – 25 of 56) sorted by relevance

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/external/llvm/lib/Target/
DTargetInstrInfo.cpp53 unsigned Class = MI->getDesc().getSchedClass(); in getNumMicroOps()
70 unsigned DefClass = DefMI->getDesc().getSchedClass(); in getOperandLatency()
71 unsigned UseClass = UseMI->getDesc().getSchedClass(); in getOperandLatency()
81 return ItinData->getStageLatency(MI->getDesc().getSchedClass()); in getInstrLatency()
90 unsigned DefClass = DefMI->getDesc().getSchedClass(); in hasLowDefLatency()
/external/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType()
46 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
DARMCodeEmitter.cpp279 const MCInstrDesc &MCID = MI.getDesc(); in getHiLo16ImmOpValue()
469 const MCInstrDesc &MCID = MI.getDesc(); in getMachineOpValue()
551 switch (MI.getDesc().TSFlags & ARMII::FormMask) { in emitInstruction()
810 const MCInstrDesc &MCID = MI.getDesc(); in emitLEApcrelInstruction()
837 const MCInstrDesc &MCID = MI.getDesc(); in emitLEApcrelJTInstruction()
862 unsigned Opcode = MI.getDesc().Opcode; in emitPseudoMoveInstruction()
907 unsigned Opcode = MI.getDesc().Opcode; in emitPseudoInstruction()
1086 const MCInstrDesc &MCID = MI.getDesc(); in emitDataProcessingInstruction()
1189 const MCInstrDesc &MCID = MI.getDesc(); in emitLoadStoreInstruction()
1273 const MCInstrDesc &MCID = MI.getDesc(); in emitMiscLoadStoreInstruction()
[all …]
DARMBaseInstrInfo.cpp127 uint64_t TSFlags = MI->getDesc().TSFlags; in convertToThreeAddress()
147 const MCInstrDesc &MCID = MI->getDesc(); in convertToThreeAddress()
526 if ((MI->getDesc().TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) { in isPredicable()
551 const MCInstrDesc &MCID = MI->getDesc(); in GetInstSizeInBytes()
1609 const MCInstrDesc &Desc = MI.getDesc(); in rewriteARMFrameIndex()
1964 const MCInstrDesc &DefMCID = DefMI->getDesc(); in FoldImmediate()
1974 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
2072 const MCInstrDesc &Desc = MI->getDesc(); in getNumMicroOps()
2492 const MCInstrDesc *DefMCID = &DefMI->getDesc(); in getOperandLatency()
2493 const MCInstrDesc *UseMCID = &UseMI->getDesc(); in getOperandLatency()
[all …]
DMLxExpansionPass.cpp140 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
276 const MCInstrDesc &MCID = MI->getDesc(); in ExpandFPMLxInstructions()
DThumb2SizeReduction.cpp282 if (!HasImplicitCPSRDef(MI->getDesc())) in VerifyPredAndCC()
511 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial()
655 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr()
714 const MCInstrDesc &MCID = MI->getDesc(); in ReduceToNarrow()
/external/llvm/lib/Support/
DStatistic.cpp93 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0; in operator ()()
137 Stats.Stats[i]->getDesc()); in PrintStatistics()
/external/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp270 unsigned NumDefs = MI->getDesc().getNumDefs(); in OptimizeBitcastInstr()
271 unsigned NumSrcs = MI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr()
300 NumDefs = DefMI->getDesc().getNumDefs(); in OptimizeBitcastInstr()
301 NumSrcs = DefMI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr()
356 const MCInstrDesc &MCID = MI->getDesc(); in isMoveImmediate()
377 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in FoldImmediate()
DTargetInstrInfoImpl.cpp63 const MCInstrDesc &MCID = MI->getDesc(); in commuteInstruction()
89 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstruction()
94 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstruction()
105 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction()
110 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction()
137 const MCInstrDesc &MCID = MI->getDesc(); in findCommutedOpIndices()
172 const MCInstrDesc &MCID = MI->getDesc(); in PredicateInstruction()
DExecutionDepsFix.cpp455 const MCInstrDesc &MCID = MI->getDesc(); in processDefs()
511 for (unsigned i = mi->getDesc().getNumDefs(), in visitHardInstr()
512 e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitHardInstr()
521 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitHardInstr()
540 for (unsigned i = mi->getDesc().getNumDefs(), in visitSoftInstr()
541 e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitSoftInstr()
630 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitSoftInstr()
DDFAPacketizer.cpp92 const llvm::MCInstrDesc &MID = MI->getDesc(); in canReserveResources()
99 const llvm::MCInstrDesc &MID = MI->getDesc(); in reserveResources()
DCriticalAntiDepBreaker.cpp210 if (i < MI->getDesc().getNumOperands()) in PrescanInstruction()
211 NewRC = TII->getRegClass(MI->getDesc(), i, TRI); in PrescanInstruction()
310 if (i < MI->getDesc().getNumOperands()) in ScanInstruction()
311 NewRC = TII->getRegClass(MI->getDesc(), i, TRI); in ScanInstruction()
DMachineInstr.cpp567 : MCID(&MI.getDesc()), Flags(0), AsmPrinterFlags(0), in MachineInstr()
759 if (MII->getDesc().getFlags() & Mask) { in hasPropertyInBundle()
943 return TII->getRegClass(getDesc(), OpIdx, TRI); in getRegClassConstraint()
1074 const MCInstrDesc &MCID = getDesc(); in findFirstPredOperandIdx()
1123 const MCInstrDesc &MCID = getDesc(); in isRegTiedToUseOperand()
1173 const MCInstrDesc &MCID = getDesc(); in isRegTiedToDefOperand()
1221 const MCInstrDesc &MCID = MI->getDesc(); in copyPredicates()
1422 for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands(); in copyImplicitOps()
1549 if (i < getDesc().NumOperands) { in print()
1550 const MCOperandInfo &MCOI = getDesc().OpInfo[i]; in print()
DScheduleDAGInstrs.cpp252 const MCInstrDesc &UseMCID = UseMI->getDesc(); in addPhysRegDataDeps()
332 const MCInstrDesc &UseMCID = UseMI->getDesc(); in addPhysRegDeps()
769 DefIdx >= (int)DefMI->getDesc().getNumOperands()) { in computeOperandLatency()
800 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
DMachineLICM.cpp813 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in InitRegPressure()
845 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in UpdateRegPressure()
1049 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction()
1106 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in UpdateBackTraceRegPressure()
1183 for (unsigned i = 0, e = MI.getDesc().getNumOperands(); i != e; ++i) { in IsProfitableToHoist()
DAggressiveAntiDepBreaker.cpp406 if (i < MI->getDesc().getNumOperands()) in PrescanInstruction()
407 RC = TII->getRegClass(MI->getDesc(), i, TRI); in PrescanInstruction()
481 if (i < MI->getDesc().getNumOperands()) in ScanInstruction()
482 RC = TII->getRegClass(MI->getDesc(), i, TRI); in ScanInstruction()
/external/llvm/include/llvm/Support/
DRegistry.h31 const char *getDesc() const { return Desc; } in getDesc() function
48 static const char *descof(const entry &Entry) { return Entry.getDesc(); } in descof()
/external/llvm/include/llvm/ADT/
DStatistic.h44 const char *getDesc() const { return Desc; } in getDesc() function
/external/llvm/lib/Target/CellSPU/
DSPUNopFiller.cpp139 int sc = instr.getDesc().getSchedClass(); in getOpPlacement()
/external/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp64 const MCInstrDesc& MCid = I->getDesc(); in runOnMachineBasicBlock()
/external/skia/include/core/
DSkDescriptor.h167 SkDescriptor* getDesc() const { return fDesc; } in getDesc() function
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h68 (MI->getDesc().isRematerializable() &&
583 return MI->getDesc().isPredicable(); in isPredicable()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h152 const MCInstrDesc &MCID = MI->getDesc();
/external/llvm/include/llvm/CodeGen/
DLexicalScopes.h170 const MDNode *getDesc() const { return Desc; } in getDesc() function
DMachineInstr.h253 const MCInstrDesc &getDesc() const { return *MCID; }
314 return getDesc().getFlags() & (1 << MCFlag);

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