/external/llvm/lib/Target/ARM/ |
D | Thumb2InstrInfo.cpp | 182 bool isSub = NumBytes < 0; in emitT2RegPlusImmediate() local 183 if (isSub) NumBytes = -NumBytes; in emitT2RegPlusImmediate() 207 if (isSub) { in emitT2RegPlusImmediate() 240 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitT2RegPlusImmediate() 248 Opc = isSub ? ARM::t2SUBri : ARM::t2ADDri; in emitT2RegPlusImmediate() 261 Opc = isSub ? ARM::t2SUBri : ARM::t2ADDri; in emitT2RegPlusImmediate() 265 Opc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in emitT2RegPlusImmediate() 394 bool isSub = false; in rewriteT2FrameIndex() local 420 isSub = true; in rewriteT2FrameIndex() 439 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex() [all …]
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D | Thumb1RegisterInfo.cpp | 100 bool isSub = false; in emitThumbRegPlusImmInReg() local 106 isSub = true; in emitThumbRegPlusImmInReg() 128 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); in emitThumbRegPlusImmInReg() 133 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmInReg() 173 bool isSub = NumBytes < 0; in emitThumbRegPlusImmediate() local 175 if (isSub) Bytes = -NumBytes; in emitThumbRegPlusImmediate() 189 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate() 191 } else if (!isSub && BaseReg == ARM::SP) { in emitThumbRegPlusImmediate() 211 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate() 216 Opc = isSub ? ARM::tSUBi8 : ARM::tADDi8; in emitThumbRegPlusImmediate() [all …]
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D | ARMBaseInstrInfo.cpp | 161 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local 169 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress() 176 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg) in convertToThreeAddress() 181 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress() 187 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local 192 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress() 197 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress() 1582 bool isSub = NumBytes < 0; in emitARMRegPlusImmediate() local 1583 if (isSub) NumBytes = -NumBytes; in emitARMRegPlusImmediate() 1596 unsigned Opc = isSub ? ARM::SUBri : ARM::ADDri; in emitARMRegPlusImmediate() [all …]
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D | ARMISelLowering.cpp | 6247 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter() local 6249 if (isSub) in EmitInstrWithCustomInserter()
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMAddressingModes.h | 410 bool isSub = Opc == sub; variable 411 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ; 444 bool isSub = Opc == sub; variable 445 return ((int)isSub << 8) | Offset | (IdxMode << 9); 493 bool isSub = Opc == sub; in getAM5Opc() local 494 return ((int)isSub << 8) | Offset; in getAM5Opc()
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 150 bool isSub = NumBytes < 0; in emitSPUpdate() local 151 uint64_t Offset = isSub ? -NumBytes : NumBytes; in emitSPUpdate() 156 Opc = isSub in emitSPUpdate() 167 unsigned Reg = isSub in emitSPUpdate() 171 Opc = isSub in emitSPUpdate() 175 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); in emitSPUpdate() 176 if (isSub) in emitSPUpdate() 187 StackPtr, false, isSub ? -ThisVal : ThisVal); in emitSPUpdate() 195 if (isSub) in emitSPUpdate()
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D | X86ISelDAGToDAG.cpp | 1502 bool isInc = false, isDec = false, isSub = false, isCN = false; in SelectAtomicLoadAdd() local 1514 isSub = true; in SelectAtomicLoadAdd() 1520 isSub = true; in SelectAtomicLoadAdd() 1533 else if (isSub) { in SelectAtomicLoadAdd() 1550 else if (isSub) { in SelectAtomicLoadAdd() 1573 else if (isSub) { in SelectAtomicLoadAdd() 1596 else if (isSub) { in SelectAtomicLoadAdd()
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombine.h | 357 bool isSub, Instruction &I);
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D | InstCombineAndOrXor.cpp | 345 ConstantInt *Mask, bool isSub, in FoldLogicalPlusAnd() argument 385 if (isSub) in FoldLogicalPlusAnd()
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 859 bool isSub = OffImm < 0; in printAddrModeImm12Operand() local 863 if (isSub) in printAddrModeImm12Operand()
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/external/valgrind/main/VEX/priv/ |
D | guest_arm_toIR.c | 15335 UInt isSub = INSN0(9,9); in disInstr_THUMB_WRK() local 15340 putIRegT(rD, binop(isSub ? Iop_Sub32 : Iop_Add32, in disInstr_THUMB_WRK() 15343 setFlags_D1_D2( isSub ? ARMG_CC_OP_SUB : ARMG_CC_OP_ADD, in disInstr_THUMB_WRK() 15345 DIP("%s r%u, r%u, #%u\n", isSub ? "subs" : "adds", rD, rN, uimm3); in disInstr_THUMB_WRK() 15356 UInt isSub = INSN0(9,9); in disInstr_THUMB_WRK() local 15361 putIRegT( rD, binop(isSub ? Iop_Sub32 : Iop_Add32, in disInstr_THUMB_WRK() 15364 setFlags_D1_D2( isSub ? ARMG_CC_OP_SUB : ARMG_CC_OP_ADD, in disInstr_THUMB_WRK() 15366 DIP("%s r%u, r%u, r%u\n", isSub ? "subs" : "adds", rD, rN, rM); in disInstr_THUMB_WRK() 15509 UInt isSub = INSN0(11,11); in disInstr_THUMB_WRK() local 15516 putIRegT( rN, binop(isSub ? Iop_Sub32 : Iop_Add32, in disInstr_THUMB_WRK() [all …]
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