/external/llvm/lib/Target/Hexagon/ |
D | HexagonCallingConvLower.h | 102 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, 107 void AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn);
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D | HexagonCallingConvLower.cpp | 180 Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() function in Hexagon_CCState 197 void Hexagon_CCState::AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) { in AnalyzeCallResult() function in Hexagon_CCState
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D | HexagonISelLowering.cpp | 356 CCInfo.AnalyzeCallResult(Ins, RetCC_Hexagon); in LowerCallResult()
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/external/llvm/lib/CodeGen/ |
D | CallingConvLower.cpp | 155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() function in CCState 172 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult() function in CCState
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/external/llvm/include/llvm/CodeGen/ |
D | CallingConvLower.h | 223 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, 228 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 2024 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true, isVarArg)); in FinishCall() 2175 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true, false)); in ARMEmitLibcall() 2283 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true, isVarArg)); in SelectCall()
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D | ARMISelLowering.cpp | 1190 CCInfo.AnalyzeCallResult(Ins, in LowerCallResult() 1782 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForNode(CalleeCC, true, isVarArg)); in IsEligibleForTailCallOptimization() 1787 CCInfo2.AnalyzeCallResult(Ins, CCAssignFnForNode(CallerCC, true, isVarArg)); in IsEligibleForTailCallOptimization()
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeISelLowering.cpp | 852 CCInfo.AnalyzeCallResult(Ins, RetCC_MBlaze); in LowerCallResult()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 577 CCInfo.AnalyzeCallResult(Ins, RetCC_MSP430); in LowerCallResult()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 600 RVInfo.AnalyzeCallResult(Ins, RetCC_Sparc32); in LowerCall()
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 1047 CCInfo.AnalyzeCallResult(Ins, RetCC_XCore); in LowerCallResult()
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 1916 CCRetInfo.AnalyzeCallResult(Ins, RetCC_X86); in DoSelectCall()
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D | X86ISelLowering.cpp | 1668 CCInfo.AnalyzeCallResult(Ins, RetCC_X86); in LowerCallResult() 2790 CCInfo.AnalyzeCallResult(Ins, RetCC_X86); in IsEligibleForTailCallOptimization() 2804 CCInfo1.AnalyzeCallResult(Ins, RetCC_X86); in IsEligibleForTailCallOptimization() 2809 CCInfo2.AnalyzeCallResult(Ins, RetCC_X86); in IsEligibleForTailCallOptimization()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 2821 CCRetInfo.AnalyzeCallResult(Ins, RetCC_PPC); in LowerCallResult() 2882 CCInfo.AnalyzeCallResult(Ins, RetCC_PPC); in FinishCall()
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/external/llvm/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 1452 CCRetInfo.AnalyzeCallResult(Ins, CCC_SPU); in LowerCall()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 2891 CCInfo.AnalyzeCallResult(Ins, RetCC_Mips); in LowerCallResult()
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