/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 49 BR_JT, // Jump table. enumerator
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D | HexagonISelLowering.cpp | 751 return DAG.getNode(HexagonISD::BR_JT, dl, MVT::Other, Chain, LoadTarget); in LowerBR_JT() 1349 setOperationAction(ISD::BR_JT, MVT::Other, Custom); in HexagonTargetLowering() 1351 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in HexagonTargetLowering() 1444 case HexagonISD::BR_JT: return "HexagonISD::BR_JT"; in getTargetNodeName() 1480 case ISD::BR_JT: return LowerBR_JT(Op, DAG); in LowerOperation()
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D | HexagonInstrInfo.td | 3428 def HexagonBR_JT: SDNode<"HexagonISD::BR_JT", SDHexagonBR_JT, [SDNPHasChain]>; 3431 def BR_JT : JRInst<(outs), (ins IntRegs:$src),
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 487 BR_JT, enumerator
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.h | 67 BR_JT, enumerator
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D | XCoreInstrInfo.cpp | 124 return BrOpc == XCore::BR_JT in IsBR_JT()
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D | XCoreISelLowering.cpp | 57 case XCoreISD::BR_JT : return "XCoreISD::BR_JT"; in getTargetNodeName() 117 setOperationAction(ISD::BR_JT, MVT::Other, Custom); in XCoreTargetLowering() 174 case ISD::BR_JT: return LowerBR_JT(Op, DAG); in LowerOperation() 343 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
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D | XCoreInstrInfo.td | 41 def XCoreBR_JT : SDNode<"XCoreISD::BR_JT", SDT_XCoreBR_JT, 962 def BR_JT : PseudoInstXCore<(outs), (ins InlineJT:$t, GRRegs:$i),
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 52 BR_JT, // Jumptable branch. enumerator
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D | ARMInstrFormats.td | 487 // BR_JT instructions 935 // BR_JT instructions
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D | ARMISelLowering.cpp | 757 setOperationAction(ISD::BR_JT, MVT::Other, Custom); in ARMTargetLowering() 891 case ARMISD::BR_JT: return "ARMISD::BR_JT"; in getTargetNodeName() 3126 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); in LowerBR_JT() 3132 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); in LowerBR_JT() 5222 case ISD::BR_JT: return LowerBR_JT(Op, DAG); in LowerOperation()
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D | ARMInstrInfo.td | 128 def ARMbrjt : SDNode<"ARMISD::BR_JT", SDT_ARMBrJT,
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 250 case ISD::BR_JT: return "br_jt"; in getOperationName()
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D | SelectionDAGBuilder.cpp | 1647 SDValue BrJumpTable = DAG.getNode(ISD::BR_JT, getCurDebugLoc(), in visitJumpTable() 2070 (TLI.isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) || in areJTsAllowed()
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D | LegalizeDAG.cpp | 3362 case ISD::BR_JT: { in ExpandNode()
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeISelLowering.cpp | 161 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MBlazeTargetLowering()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 108 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MSP430TargetLowering()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 161 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in NVPTXTargetLowering()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 746 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in SparcTargetLowering()
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/external/llvm/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 163 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in SPUTargetLowering()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 200 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MipsTargetLowering()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 187 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in PPCTargetLowering()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 370 setOperationAction(ISD::BR_JT , MVT::Other, Expand); in X86TargetLowering()
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