Searched refs:FABS (Results 1 – 19 of 19) sorted by relevance
455 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator
1158 setOperationAction(ISD::FABS, MVT::f32, Legal); in HexagonTargetLowering()1159 setOperationAction(ISD::FABS, MVT::f64, Expand); in HexagonTargetLowering()1270 setOperationAction(ISD::FABS, MVT::f32, Expand); in HexagonTargetLowering()1271 setOperationAction(ISD::FABS, MVT::f64, Expand); in HexagonTargetLowering()
138 case ISD::FABS: return "fabs"; in getOperationName()
66 case ISD::FABS: R = SoftenFloatRes_FABS(N); break; in SoftenFloatResult()849 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break; in ExpandFloatResult()902 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp); in ExpandFloatRes_FABS()
1145 case ISD::FABS: return visitFABS(N); in visit()5442 (N0.getOpcode() == ISD::FABS && !TLI.isFAbsFree(VT))) && in visitBITCAST()5452 assert(N0.getOpcode() == ISD::FABS); in visitBITCAST()6150 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT)) in visitFCOPYSIGN()6151 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0); in visitFCOPYSIGN()6155 DAG.getNode(ISD::FABS, N0.getDebugLoc(), VT, N0)); in visitFCOPYSIGN()6162 if (N0.getOpcode() == ISD::FABS || N0.getOpcode() == ISD::FNEG || in visitFCOPYSIGN()6168 if (N1.getOpcode() == ISD::FABS) in visitFCOPYSIGN()6169 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0); in visitFCOPYSIGN()6514 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0); in visitFABS()[all …]
208 case ISD::FABS: in LegalizeOp()
71 case ISD::FABS: in ScalarizeVectorResult()506 case ISD::FABS: in SplitVectorResult()1352 case ISD::FABS: in WidenVectorResult()
2482 case ISD::FABS: in getNode()2670 case ISD::FABS: in getNode()2672 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); in getNode()
1533 SDValue AbsVal = DAG.getNode(ISD::FABS, dl, Tmp1.getValueType(), Tmp1); in ExpandFCOPYSIGN()2964 case ISD::FABS: { in ExpandNode()
4967 setValue(&I, DAG.getNode(ISD::FABS, dl, in visitIntrinsicCall()5649 if (visitUnaryFloatCall(I, ISD::FABS)) in visitCall()
207 defm FABS : FFR1P_M<0x5, "abs", fabs>;
169 setOperationAction(ISD::FABS, MVT::f32, Custom); in MipsTargetLowering()170 setOperationAction(ISD::FABS, MVT::f64, Custom); in MipsTargetLowering()804 case ISD::FABS: return LowerFABS(Op, DAG); in LowerOperation()
819 } else if (Opc == ISD::FABS) { in Select()
580 setOperationAction(ISD::FABS , MVT::f64, Custom); in X86TargetLowering()581 setOperationAction(ISD::FABS , MVT::f32, Custom); in X86TargetLowering()612 setOperationAction(ISD::FABS , MVT::f32, Custom); in X86TargetLowering()734 setOperationAction(ISD::FABS, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()832 setOperationAction(ISD::FABS, MVT::v4f32, Custom); in X86TargetLowering()866 setOperationAction(ISD::FABS, MVT::v2f64, Custom); in X86TargetLowering()1033 setOperationAction(ISD::FABS, MVT::v8f32, Custom); in X86TargetLowering()1042 setOperationAction(ISD::FABS, MVT::v4f64, Custom); in X86TargetLowering()11293 case ISD::FABS: return LowerFABS(Op, DAG); in LowerOperation()
372 def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>;
701 defm FABS : F2<"abs", fabs>;
489 setOperationAction(ISD::FABS, MVT::v2f64, Expand); in ARMTargetLowering()
131907 #define FABS(a) ((a)<0.0?-1.0*(a):(a))131916 float diff = FABS(right-left);
131938 #define FABS(a) ((a)<0.0?-1.0*(a):(a))131947 float diff = FABS(right-left);