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Searched refs:SETOEQ (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/CodeGen/
DAnalysis.cpp155 case FCmpInst::FCMP_OEQ: return ISD::SETOEQ; in getFCmpCondCode()
176 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h727 SETOEQ, // 0 0 0 1 True if ordered and equal enumerator
/external/llvm/lib/Target/CellSPU/
DREADME.txt81 SETOEQ unimplemented
DSPUISelLowering.cpp2593 case ISD::SETOEQ: in LowerSETCC()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1110 setCondCodeAction(ISD::SETOEQ, MVT::f32, Legal); in HexagonTargetLowering()
1111 setCondCodeAction(ISD::SETOEQ, MVT::f64, Legal); in HexagonTargetLowering()
1203 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand); in HexagonTargetLowering()
1206 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand); in HexagonTargetLowering()
/external/llvm/lib/Target/MBlaze/
DMBlazeInstrFPU.td146 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETOEQ),
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp288 case ISD::SETOEQ: return "setoeq"; in getOperationName()
DLegalizeFloatTypes.cpp624 case ISD::SETOEQ: in SoftenSetCCOperands()
1310 LHSHi, RHSHi, ISD::SETOEQ); in FloatExpandSetCCOperands()
DTargetLowering.cpp2410 if (Cond == ISD::SETOEQ && in SimplifySetCC()
2423 if (Cond == ISD::SETOEQ && in SimplifySetCC()
DSelectionDAG.cpp327 case ISD::SETOEQ: // SETEQ & SETU[LG]E in getSetCCAndOperation()
1576 case ISD::SETOEQ: in FoldSetCC()
1622 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); in FoldSetCC()
DLegalizeDAG.cpp1594 case ISD::SETOEQ: CC1 = ISD::SETEQ; CC2 = ISD::SETO; Opc = ISD::AND; break; in LegalizeSetCCCondCode()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp568 case ISD::SETOEQ: in getPredicateForSetCC()
603 case ISD::SETOEQ: in getCRIdxForSetCC()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td498 def SETOEQ : CondCode; def SETOGT : CondCode;
829 (setcc node:$lhs, node:$rhs, SETOEQ)>;
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp671 case ISD::SETOEQ: return SPCC::FCC_E; in FPCondCCodeToFCC()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp241 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand); in X86TargetLowering()
242 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand); in X86TargetLowering()
243 setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand); in X86TargetLowering()
3150 case ISD::SETOEQ: in TranslateX86CC()
8785 case ISD::SETOEQ: in LowerVSETCC()
9307 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETOEQ) { in LowerBRCOND()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp1110 case ISD::SETOEQ: CondCode = ARMCC::EQ; break; in FPCCToARMCC()
3021 if (CC == ISD::SETOEQ) in OptimizeVFPBrcond()
3074 (CC == ISD::SETEQ || CC == ISD::SETOEQ || in LowerBR_CC()
3595 case ISD::SETOEQ: in LowerVSETCC()
/external/llvm/lib/Target/NVPTX/
DNVPTXVector.td952 (setcc node:$lhs, node:$rhs, SETOEQ)>;
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp539 case ISD::SETOEQ: return Mips::FCOND_OEQ; in FPCondCCodeToFCC()