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Searched refs:getNode (Results 1 – 25 of 184) sorted by relevance

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/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp476 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
481 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
495 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
506 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
512 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
519 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
523 return DAG.getNode(ISD::FP_ROUND, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression()
562 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) in isOneUseSetCC()
577 return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode); in ReassociateOps()
581 SDValue OpNode = DAG.getNode(Opc, N0.getDebugLoc(), VT, in ReassociateOps()
[all …]
DLegalizeVectorOps.cpp112 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i) in TranslateLegalizeResults()
123 SDNode* Node = Op.getNode(); in LegalizeOp()
131 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0); in LegalizeOp()
134 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); in LegalizeOp()
143 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LegalizeOp()
256 if (Tmp1.getNode()) { in LegalizeOp()
274 Result = DAG.UnrollVectorOp(Op.getNode()); in LegalizeOp()
295 assert(Op.getNode()->getNumValues() == 1 && in PromoteVectorOp()
303 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in PromoteVectorOp()
308 Op = DAG.getNode(Op.getOpcode(), dl, NVT, &Operands[0], Operands.size()); in PromoteVectorOp()
[all …]
DLegalizeTypesGeneric.cpp54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
82 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, in ExpandRes_BITCAST()
[all …]
DLegalizeIntegerTypes.cpp143 if (Res.getNode()) in PromoteIntegerResult()
156 return DAG.getNode(ISD::AssertSext, N->getDebugLoc(), in PromoteIntRes_AssertSext()
163 return DAG.getNode(ISD::AssertZext, N->getDebugLoc(), in PromoteIntRes_AssertZext()
220 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
224 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
231 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
245 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
249 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
256 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); in PromoteIntRes_BITCAST()
259 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
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DLegalizeDAG.cpp167 ReplacedNode(Old.getNode()); in ReplaceNode()
315 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); in ExpandUnalignedStore()
356 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandUnalignedStore()
358 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); in ExpandUnalignedStore()
380 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0], in ExpandUnalignedStore()
397 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in ExpandUnalignedStore()
404 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, in ExpandUnalignedStore()
413 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2); in ExpandUnalignedStore()
438 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in ExpandUnalignedLoad()
440 Result = DAG.getNode(VT.isFloatingPoint() ? ISD::FP_EXTEND : in ExpandUnalignedLoad()
[all …]
DSelectionDAGBuilder.cpp132 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
133 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
139 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); in getCopyFromParts()
153 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); in getCopyFromParts()
154 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi, in getCopyFromParts()
157 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); in getCopyFromParts()
158 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); in getCopyFromParts()
165 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); in getCopyFromParts()
166 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); in getCopyFromParts()
169 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); in getCopyFromParts()
[all …]
DLegalizeVectorTypes.cpp124 if (R.getNode()) in ScalarizeVectorResult()
131 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), in ScalarizeVecRes_BinOp()
139 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), in ScalarizeVecRes_TernaryOp()
151 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), in ScalarizeVecRes_BITCAST()
161 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp); in ScalarizeVecRes_BUILD_VECTOR()
177 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), in ScalarizeVecRes_EXTRACT_SUBVECTOR()
185 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(), in ScalarizeVecRes_FP_ROUND()
191 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(), in ScalarizeVecRes_FPOWI()
202 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op); in ScalarizeVecRes_INSERT_VECTOR_ELT()
230 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op); in ScalarizeVecRes_UnaryOp()
[all …]
DResourcePriorityQueue.cpp79 const SDNode *ScegN = PredSU->getNode(); in numberRCValPredInSU()
117 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
135 EVT VT = Op.getNode()->getValueType(Op.getResNo()); in numberRCValSuccInSU()
248 if (!SU || !SU->getNode()) in isResourceAvailable()
253 if (SU->getNode()->getGluedNode()) in isResourceAvailable()
258 if (SU->getNode()->isMachineOpcode()) in isResourceAvailable()
259 switch (SU->getNode()->getMachineOpcode()) { in isResourceAvailable()
262 SU->getNode()->getMachineOpcode()))) in isResourceAvailable()
293 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { in reserveResources()
298 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { in reserveResources()
[all …]
DLegalizeTypes.cpp102 assert(NewVal.getNode()->getNodeId() != NewNode && in PerformExpensiveChecks()
271 if (IgnoreNodeResults(N->getOperand(i).getNode())) in run()
416 if (!IgnoreNodeResults(I->getOperand(i).getNode()) && in run()
476 if (Op.getNode()->getNodeId() == Processed) in AnalyzeNewNode()
522 Val.setNode(AnalyzeNewNode(Val.getNode())); in AnalyzeNewValue()
523 if (Val.getNode()->getNodeId() == Processed) in AnalyzeNewValue()
558 assert(I->first.getNode() != N); in ExpungeNode()
564 assert(I->first.getNode() != N); in ExpungeNode()
570 assert(I->first.getNode() != N); in ExpungeNode()
576 assert(I->first.getNode() != N); in ExpungeNode()
[all …]
DTargetLowering.cpp1124 SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0), in ShrinkDemandedConstant()
1149 assert(Op.getNode()->getNumValues() == 1 && in ShrinkDemandedOp()
1154 if (!Op.getNode()->hasOneUse()) in ShrinkDemandedOp()
1168 SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT, in ShrinkDemandedOp()
1169 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, in ShrinkDemandedOp()
1170 Op.getNode()->getOperand(0)), in ShrinkDemandedOp()
1171 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, in ShrinkDemandedOp()
1172 Op.getNode()->getOperand(1))); in ShrinkDemandedOp()
1173 SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X); in ShrinkDemandedOp()
1203 if (!Op.getNode()->hasOneUse()) { in SimplifyDemandedBits()
[all …]
DLegalizeFloatTypes.cpp103 if (R.getNode()) in SoftenFloatResult()
119 return DAG.getNode(ISD::BUILD_PAIR, N->getDebugLoc(), in SoftenFloatRes_BUILD_PAIR()
134 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), in SoftenFloatRes_EXTRACT_VECTOR_ELT()
148 return DAG.getNode(ISD::AND, N->getDebugLoc(), NVT, Op, Mask); in SoftenFloatRes_FABS()
186 SDValue SignBit = DAG.getNode(ISD::SHL, dl, RVT, DAG.getConstant(1, RVT), in SoftenFloatRes_FCOPYSIGN()
189 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftenFloatRes_FCOPYSIGN()
194 SignBit = DAG.getNode(ISD::SRL, dl, RVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
197 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
199 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
200 SignBit = DAG.getNode(ISD::SHL, dl, LVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
[all …]
DScheduleDAGSDNodes.cpp90 SUnit *SU = newSUnit(Old->getNode()); in Clone()
142 if (ExtraOper.getNode()) in CloneNodeWithValues()
164 SDNode *GlueDestNode = Glue.getNode(); in AddGlue()
211 Chain = Node->getOperand(NumOps-1).getNode(); in ClusterNeighboringLoads()
284 else if (!OutGlue && InGlue.getNode()) in ClusterNeighboringLoads()
285 RemoveUnusedGlue(InGlue.getNode(), DAG); in ClusterNeighboringLoads()
327 Worklist.push_back(DAG->getRoot().getNode()); in BuildSchedUnits()
328 Visited.insert(DAG->getRoot().getNode()); in BuildSchedUnits()
336 if (Visited.insert(NI->getOperand(i).getNode())) in BuildSchedUnits()
337 Worklist.push_back(NI->getOperand(i).getNode()); in BuildSchedUnits()
[all …]
/external/llvm/lib/Target/CellSPU/
DSPUISelLowering.cpp79 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext()); in ExpandLibCall()
609 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, in LowerLOAD()
629 rotate = DAG.getNode(ISD::ADD, dl, PtrVT, in LowerLOAD()
648 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); in LowerLOAD()
654 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1); in LowerLOAD()
657 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, in LowerLOAD()
664 rotate = DAG.getNode(ISD::ADD, dl, PtrVT, in LowerLOAD()
681 result = DAG.getNode(SPUISD::ROTBYTES_LEFT, dl, MVT::i128, in LowerLOAD()
688 result = DAG.getNode(SPUISD::VEC2PREFSLOT, dl, InVT, in LowerLOAD()
689 DAG.getNode(ISD::BITCAST, dl, vecVT, result)); in LowerLOAD()
[all …]
DSPUISelDAGToDAG.cpp120 return DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, in getCarryGenerateShufMask()
135 return DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, in getBorrowGenerateShufMask()
182 (SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i16).getNode() != 0)) || in emitBuildVector()
184 ((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i32).getNode() != 0) || in emitBuildVector()
185 (SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i32).getNode() != 0) || in emitBuildVector()
186 (SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i32).getNode() != 0) || in emitBuildVector()
187 (SPU::get_v4i32_imm(bvNode, *CurDAG).getNode() != 0))) || in emitBuildVector()
189 ((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) || in emitBuildVector()
190 (SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) || in emitBuildVector()
191 (SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i64).getNode() != 0)))) { in emitBuildVector()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp89 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, in Extract128BitVector()
122 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, in Insert128BitVector()
1402 return DAG.getNode(X86ISD::GlobalBaseReg, DebugLoc(), getPointerTy()); in getPICJumpTableRelocBase()
1522 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1524 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1526 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1528 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
1551 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy); in LowerReturn()
1562 ValToCopy = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ValToCopy); in LowerReturn()
1563 ValToCopy = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, in LowerReturn()
[all …]
DX86ISelDAGToDAG.cpp85 return IndexReg.getNode() != 0 || Base_Reg.getNode() != 0; in hasBaseOrIndexReg()
93 dyn_cast_or_null<RegisterSDNode>(Base_Reg.getNode())) in isRIPRelative()
107 if (Base_Reg.getNode() != 0) in dump()
108 Base_Reg.getNode()->dump(); in dump()
114 if (IndexReg.getNode() != 0) in dump()
115 IndexReg.getNode()->dump(); in dump()
259 if (AM.Segment.getNode()) in getAddressOperands()
367 if (Chain.getNode() == Load.getNode()) in MoveBelowOrigChain()
373 if (Chain.getOperand(i).getNode() == Load.getNode()) in MoveBelowOrigChain()
378 CurDAG->getNode(ISD::TokenFactor, Load.getDebugLoc(), in MoveBelowOrigChain()
[all …]
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp184 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG); in LowerOperation()
216 SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i32, Op.getOperand(2), in LowerSELECT_CC()
218 return DAG.getNode(ISD::SELECT, dl, MVT::i32, Cond, Op.getOperand(0), in LowerSELECT_CC()
229 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
239 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
241 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
253 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, in BuildGetId()
290 SDValue offset = DAG.getNode(ISD::MUL, dl, MVT::i32, BuildGetId(DAG, dl), in LowerGlobalTLSAddress()
292 return DAG.getNode(ISD::ADD, dl, MVT::i32, base, offset); in LowerGlobalTLSAddress()
303 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, getPointerTy(), Result); in LowerBlockAddress()
[all …]
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp1210 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1213 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
1214 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1225 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1226 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1240 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1259 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); in LowerMemOpCallTo()
1273 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
1281 if (StackPtr.getNode() == 0) in PassF64ArgInRegs()
1367 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
[all …]
DARMSelectionDAGInfo.cpp67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, in EmitTargetCodeForMemcpy()
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); in EmitTargetCodeForMemcpy()
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, in EmitTargetCodeForMemcpy()
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); in EmitTargetCodeForMemcpy()
106 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, in EmitTargetCodeForMemcpy()
115 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); in EmitTargetCodeForMemcpy()
129 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, in EmitTargetCodeForMemcpy()
136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); in EmitTargetCodeForMemcpy()
171 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); in EmitTargetCodeForMemset()
173 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); in EmitTargetCodeForMemset()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp337 SDNode *ADDCNode = ADDENode->getOperand(2).getNode(); in SelectMadd()
344 SDNode *MultNode = MultHi.getNode(); in SelectMadd()
348 if (MultLo.getNode() != MultNode) in SelectMadd()
376 SDValue MAdd = CurDAG->getNode(MultOpc, dl, MVT::Glue, in SelectMadd()
410 SDNode *SUBCNode = SUBENode->getOperand(2).getNode(); in SelectMsub()
417 SDNode *MultNode = MultHi.getNode(); in SelectMsub()
421 if (MultLo.getNode() != MultNode) in SelectMsub()
449 SDValue MSub = CurDAG->getNode(MultOpc, dl, MVT::Glue, in SelectMsub()
511 SDValue DivRem = DAG.getNode(opc, dl, MVT::Glue, in PerformDivRemCombine()
592 return DAG.getNode(MipsISD::FPCmp, dl, MVT::Glue, LHS, RHS, in CreateFPCmp()
[all …]
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp137 if (Flag.getNode()) in LowerReturn()
138 return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain, in LowerReturn()
140 return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain, in LowerReturn()
206 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments()
207 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); in LowerFormalArguments()
215 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg); in LowerFormalArguments()
217 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg, in LowerFormalArguments()
219 Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg); in LowerFormalArguments()
261 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments()
262 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue); in LowerFormalArguments()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp552 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { in isFloatingPointZero()
754 if (UniquedVals[i&(Multiple-1)].getNode() == 0) in get_VSPLTI_elt()
769 if (UniquedVals[i].getNode() == 0) continue; // Must have been undefs. in get_VSPLTI_elt()
776 if (UniquedVals[Multiple-1].getNode() == 0) in get_VSPLTI_elt()
783 if (UniquedVals[Multiple-1].getNode() == 0) in get_VSPLTI_elt()
796 if (OpVal.getNode() == 0) in get_VSPLTI_elt()
802 if (OpVal.getNode() == 0) return SDValue(); // All UNDEF: use implicit def. in get_VSPLTI_elt()
861 return isIntS16Immediate(Op.getNode(), Imm); in isIntS16Immediate()
1204 SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, HiPart, Zero); in LowerLabelRef()
1205 SDValue Lo = DAG.getNode(PPCISD::Lo, DL, PtrVT, LoPart, Zero); in LowerLabelRef()
[all …]
/external/llvm/include/llvm/CodeGen/PBQP/
DGraph.h111 NodeEntry& getNode(NodeItr nItr) { return *nItr; } in getNode() function
112 const NodeEntry& getNode(ConstNodeItr nItr) const { return *nItr; } in getNode() function
128 NodeEntry &n1 = getNode(ne.getNode1()); in addConstructedEdge()
129 NodeEntry &n2 = getNode(ne.getNode2()); in addConstructedEdge()
195 Vector& getNodeCosts(NodeItr nItr) { return getNode(nItr).getCosts(); } in getNodeCosts()
201 return getNode(nItr).getCosts(); in getNodeCosts()
209 void setNodeData(NodeItr nItr, void *data) { getNode(nItr).setData(data); } in setNodeData()
214 void* getNodeData(NodeItr nItr) { return getNode(nItr).getData(); } in getNodeData()
244 return getNode(nItr).getDegree(); in getNodeDegree()
269 return getNode(nItr).edgesBegin(); in adjEdgesBegin()
[all …]
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp279 return DAG.getNode(NVPTXISD::Wrapper, dl, getPointerTy(), Op); in LowerGlobalAddress()
486 Chain = DAG.getNode(NVPTXISD::DeclareScalarParam, dl, DeclareParamVTs, in LowerCall()
502 Chain = DAG.getNode(opcode, dl, CopyParamVTs, CopyParamOps, 5); in LowerCall()
527 Chain = DAG.getNode(NVPTXISD::DeclareParam, dl, DeclareParamVTs, in LowerCall()
541 SDValue srcAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), in LowerCall()
552 Chain = DAG.getNode(NVPTXISD::StoreParam, dl, CopyParamVTs, in LowerCall()
580 Chain = DAG.getNode(NVPTXISD::DeclareScalarParam, dl, DeclareParamVTs, in LowerCall()
583 SDValue srcAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), OutVals[i], in LowerCall()
592 Chain = DAG.getNode(NVPTXISD::MoveToParam, dl, CopyParamVTs, in LowerCall()
600 GlobalAddressSDNode *Func = dyn_cast<GlobalAddressSDNode>(Callee.getNode()); in LowerCall()
[all …]
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h300 assert((!N.getNode() || N.getValueType() == MVT::Other) &&
302 if (N.getNode())
303 checkForCycles(N.getNode());
305 if (N.getNode())
443 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
454 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
462 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
468 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
478 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
521 return getNode(ISD::CALLSEQ_START, DebugLoc(), VTs, Ops, 2);
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