| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 240 FCOPYSIGN, enumerator
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 80 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in MBlazeTargetLowering()
81 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in MBlazeTargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 182 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
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| D | DAGCombiner.cpp | 1136 case ISD::FCOPYSIGN: return visitFCOPYSIGN(N); in visit()
5461 if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse() && in visitBITCAST()
6143 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, N0, N1); in visitFCOPYSIGN()
6163 N0.getOpcode() == ISD::FCOPYSIGN) in visitFCOPYSIGN()
6164 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFCOPYSIGN()
6172 if (N1.getOpcode() == ISD::FCOPYSIGN) in visitFCOPYSIGN()
6173 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFCOPYSIGN()
6179 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFCOPYSIGN()
6334 if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse()) { in visitFP_ROUND()
6338 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFP_ROUND()
[all …]
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| D | LegalizeFloatTypes.cpp | 69 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break; in SoftenFloatResult()
852 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult()
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| D | SelectionDAG.cpp | 2843 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. in getNode()
3081 case ISD::FCOPYSIGN: in getNode()
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| D | LegalizeVectorTypes.cpp | 1307 case ISD::FCOPYSIGN: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 2954 case ISD::FCOPYSIGN: in ExpandNode()
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| D | SelectionDAGBuilder.cpp | 5641 setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(), in visitCall()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 776 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in SparcTargetLowering()
777 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1373 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in HexagonTargetLowering()
1374 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 161 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in MipsTargetLowering()
162 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in MipsTargetLowering()
803 case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 225 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in SPUTargetLowering()
226 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in SPUTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 588 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in X86TargetLowering()
589 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in X86TargetLowering()
620 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in X86TargetLowering()
621 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in X86TargetLowering()
646 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in X86TargetLowering()
647 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in X86TargetLowering()
671 setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand); in X86TargetLowering()
741 setOperationAction(ISD::FCOPYSIGN, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
11295 case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 388 def fcopysign : SDNode<"ISD::FCOPYSIGN" , SDTFPSignOp>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 483 setOperationAction(ISD::FCOPYSIGN, MVT::v2f64, Expand); in ARMTargetLowering()
768 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in ARMTargetLowering()
769 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in ARMTargetLowering()
5231 case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 152 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in PPCTargetLowering()
153 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in PPCTargetLowering()
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