/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.h | 40 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, in printAddrRegExtendOperand() 78 unsigned OpNum, raw_ostream &o) { in printOffsetUImm12Operand() 93 void printNamedImmOperand(const MCInst *MI, unsigned OpNum, in printNamedImmOperand() 106 void printMRSOperand(const MCInst *MI, unsigned OpNum, in printMRSOperand() 111 void printMSROperand(const MCInst *MI, unsigned OpNum, in printMSROperand() 121 void printLSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { in printLSROperand() 124 void printASROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { in printASROperand() 127 void printROROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { in printROROperand() 132 void printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { in printShiftOperand() 152 void printRegExtendOperand(const MCInst *MI, unsigned OpNum, in printRegExtendOperand()
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D | AArch64InstPrinter.cpp | 54 unsigned OpNum, raw_ostream &O) { in printOffsetSImm9Operand() 62 AArch64InstPrinter::printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, in printAddrRegExtendOperand() 93 unsigned OpNum, raw_ostream &O) { in printAddSubImmLSL0Operand() 107 AArch64InstPrinter::printAddSubImmLSL12Operand(const MCInst *MI, unsigned OpNum, in printAddSubImmLSL12Operand() 116 AArch64InstPrinter::printBareImmOperand(const MCInst *MI, unsigned OpNum, in printBareImmOperand() 123 AArch64InstPrinter::printBFILSBOperand(const MCInst *MI, unsigned OpNum, in printBFILSBOperand() 131 void AArch64InstPrinter::printBFIWidthOperand(const MCInst *MI, unsigned OpNum, in printBFIWidthOperand() 140 AArch64InstPrinter::printBFXWidthOperand(const MCInst *MI, unsigned OpNum, in printBFXWidthOperand() 154 AArch64InstPrinter::printCRxOperand(const MCInst *MI, unsigned OpNum, in printCRxOperand() 163 AArch64InstPrinter::printCVTFixedPosOperand(const MCInst *MI, unsigned OpNum, in printCVTFixedPosOperand() [all …]
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 315 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, in printThumbLdrLabelOperand() 334 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, in printSORegRegOperand() 353 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, in printSORegImmOperand() 443 unsigned OpNum, in printAddrMode2OffsetOperand() 542 unsigned OpNum, in printAddrMode3OffsetOperand() 560 unsigned OpNum, in printPostIdxImm8Operand() 569 void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, in printPostIdxRegOperand() 579 unsigned OpNum, in printPostIdxImm8s4Operand() 589 void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum, in printLdStmModeOperand() 596 void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum, in printAddrMode5Operand() [all …]
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/external/llvm/lib/Bitcode/Reader/ |
D | BitcodeReader.cpp | 2089 unsigned OpNum = 0; in ParseFunctionBody() local 2135 unsigned OpNum = 0; in ParseFunctionBody() local 2151 unsigned OpNum = 0; in ParseFunctionBody() local 2173 unsigned OpNum = 0; in ParseFunctionBody() local 2194 unsigned OpNum = 0; in ParseFunctionBody() local 2219 unsigned OpNum = 0; in ParseFunctionBody() local 2234 unsigned OpNum = 0; in ParseFunctionBody() local 2259 unsigned OpNum = 0; in ParseFunctionBody() local 2270 unsigned OpNum = 0; in ParseFunctionBody() local 2283 unsigned OpNum = 0; in ParseFunctionBody() local [all …]
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/external/llvm/lib/Target/MSP430/ |
D | MSP430AsmPrinter.cpp | 64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, in printOperand() 111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, in printSrcMemOperand()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64AsmPrinter.cpp | 154 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, in PrintAsmOperand() 261 unsigned OpNum, in PrintAsmMemoryOperand()
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/external/llvm/include/llvm/MC/MCParser/ |
D | MCParsedAsmOperand.h | 37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } in setMCOperandNum()
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/external/llvm/lib/Target/ARM/ |
D | ARMAsmPrinter.cpp | 334 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, in printOperand() 416 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, in PrintAsmOperand() 555 unsigned OpNum, unsigned AsmVariant, in PrintAsmMemoryOperand() 985 int OpNum = 1; in EmitJumpTable() local 1036 int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; in EmitJump2Table() local
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D | Thumb2SizeReduction.cpp | 349 unsigned OpNum = 3; // First 'rest' of operands. in ReduceLoadStore() local
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D | ARMBaseInstrInfo.cpp | 4030 unsigned OpNum, in getPartialRegUpdateClearance() 4092 unsigned OpNum, in breakPartialRegDependency()
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D | ARMLoadStoreOptimizer.cpp | 783 for (unsigned OpNum = 3, e = MI->getNumOperands(); OpNum != e; ++OpNum) in MergeBaseUpdateLSMultiple() local
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D | ARMISelLowering.cpp | 4738 unsigned OpNum = (PFEntry >> 26) & 0x0F; in GeneratePerfectShuffle() local
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/external/llvm/lib/Target/Mips/ |
D | MipsAsmPrinter.cpp | 322 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, in PrintAsmOperand() 419 unsigned OpNum, unsigned AsmVariant, in PrintAsmMemoryOperand()
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/external/llvm/lib/CodeGen/ |
D | RegAllocFast.cpp | 582 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum, in defineVirtReg() 615 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum, in reloadVirtReg() 666 bool RAFast::setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) { in setPhysReg()
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D | TargetInstrInfo.cpp | 39 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, in getRegClass()
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/external/llvm/lib/Target/R600/InstPrinter/ |
D | AMDGPUInstPrinter.cpp | 47 void AMDGPUInstPrinter::printInterpSlot(const MCInst *MI, unsigned OpNum, in printInterpSlot()
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/external/llvm/utils/PerfectShuffle/ |
D | PerfectShuffle.cpp | 106 unsigned short OpNum; member 394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0; in main() local
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 1243 getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum, in getT2AddrModeSORegOpValue() 1261 getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum, in getT2AddrModeImm8OpValue() 1282 getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum, in getT2AddrModeImm8OffsetOpValue() 1298 getT2AddrModeImm12OffsetOpValue(const MCInst &MI, unsigned OpNum, in getT2AddrModeImm12OffsetOpValue()
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/external/llvm/include/llvm/Target/ |
D | TargetInstrInfo.h | 942 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, in getPartialRegUpdateClearance() 966 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, in breakPartialRegDependency()
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/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 151 int getOperandConstraint(unsigned OpNum, in getOperandConstraint()
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.cpp | 3813 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, in getPartialRegUpdateClearance() 3836 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, in breakPartialRegDependency() 4064 unsigned OpNum = Ops[0]; in canFoldMemoryOperand() local
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D | X86ISelLowering.cpp | 4775 unsigned NumElems, unsigned &OpNum) { in isShuffleMaskConsecutive()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 5156 unsigned OpNum = (PFEntry >> 26) & 0x0F; in GeneratePerfectShuffle() local
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