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Searched refs:ArgFlags (Results 1 – 20 of 20) sorted by relevance

/external/llvm/lib/CodeGen/
DCallingConvLower.cpp45 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
46 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
47 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
73 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
74 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeFormalArguments()
91 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
92 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
105 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
106 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeReturn()
123 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
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/external/llvm/lib/Target/Hexagon/
DHexagonCallingConvLower.cpp44 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
45 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
46 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
82 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
83 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 0, 0, false)) { in AnalyzeFormalArguments()
118 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){ in AnalyzeReturn()
148 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
149 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, in AnalyzeCallOperands()
167 ISD::ArgFlagsTy ArgFlags = Flags[i]; in AnalyzeCallOperands() local
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DHexagonVarargsCallingConvention.h22 ISD::ArgFlagsTy ArgFlags,
31 ISD::ArgFlagsTy ArgFlags, in CC_Hexagon32_VarArgs() argument
37 if (ArgFlags.isByVal() && in CC_Hexagon32_VarArgs()
38 ((ByValSize = ArgFlags.getByValSize()) > in CC_Hexagon32_VarArgs()
84 if (ArgFlags.isByVal()) { in CC_Hexagon32_VarArgs()
100 ISD::ArgFlagsTy ArgFlags, in RetCC_Hexagon32_VarArgs() argument
DHexagonISelLowering.cpp54 ISD::ArgFlagsTy ArgFlags, CCState &State);
59 ISD::ArgFlagsTy ArgFlags, CCState &State);
64 ISD::ArgFlagsTy ArgFlags, CCState &State);
69 ISD::ArgFlagsTy ArgFlags, CCState &State);
74 ISD::ArgFlagsTy ArgFlags, CCState &State);
79 ISD::ArgFlagsTy ArgFlags, CCState &State);
84 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg() argument
92 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Hexagon_VarArg()
97 if (ArgFlags.isByVal()) { in CC_Hexagon_VarArg()
100 assert ((ArgFlags.getByValSize() > 8) && in CC_Hexagon_VarArg()
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DHexagonCallingConvLower.h38 ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State,
178 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/external/llvm/lib/Target/ARM/
DARMCallingConv.h60 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() argument
108 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
140 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
151 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
153 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
DARMCallingConv.td14 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
115 "ArgFlags.getOrigAlign() != 8",
DARMFastISel.cpp209 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1903 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1910 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2223 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2227 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2244 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2250 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2334 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2339 ArgFlags.reserve(arg_size); in SelectCall()
2377 ArgFlags.push_back(Flags); in SelectCall()
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/external/clang/include/clang/Basic/
DIdentifierTable.h598 ArgFlags = ZeroArg|OneArg enumerator
604 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
610 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
616 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo()
620 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector()
624 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
/external/llvm/include/llvm/Target/
DTargetCallingConv.td42 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
51 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
55 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
59 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
63 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h137 ISD::ArgFlagsTy ArgFlags, CCState &State);
144 ISD::ArgFlagsTy &ArgFlags, CCState &State);
307 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/external/llvm/lib/Target/R600/
DAMDGPUCallingConv.td15 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2423 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32() argument
2438 if (ArgFlags.isByVal()) in CC_MipsO32()
2444 if (ArgFlags.isSExt()) in CC_MipsO32()
2446 else if (ArgFlags.isZExt()) in CC_MipsO32()
2459 unsigned OrigAlign = ArgFlags.getOrigAlign(); in CC_MipsO32()
3393 ISD::ArgFlagsTy ArgFlags = Args[I].Flags; in analyzeCallOperands() local
3396 if (ArgFlags.isByVal()) { in analyzeCallOperands()
3397 handleByValArg(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags); in analyzeCallOperands()
3402 R = VarFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); in analyzeCallOperands()
3406 R = FixedFn(I, ArgVT, RegVT, CCValAssign::Full, ArgFlags, CCInfo); in analyzeCallOperands()
[all …]
DMipsISelLowering.h264 ISD::ArgFlagsTy ArgFlags);
/external/llvm/lib/Target/X86/
DX86FastISel.cpp1693 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in DoSelectCall() local
1698 ArgFlags.reserve(arg_size); in DoSelectCall()
1779 ArgFlags.push_back(Flags); in DoSelectCall()
1791 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_X86); in DoSelectCall()
1874 ISD::ArgFlagsTy Flags = ArgFlags[VA.getValNo()]; in DoSelectCall()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp38 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() argument
40 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet()
51 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64() argument
/external/llvm/lib/Target/MBlaze/
DMBlazeISelLowering.cpp40 ISD::ArgFlagsTy &ArgFlags,
660 ISD::ArgFlagsTy &ArgFlags, in CC_MBlaze_AssignReg() argument
/external/llvm/lib/Target/AArch64/
DAArch64CallingConv.td47 CCIf<"ArgFlags.getOrigAlign() == " # Align, A>;
DAArch64ISelLowering.cpp800 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_AArch64NoMoreRegs() argument
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp41 ISD::ArgFlagsTy &ArgFlags,
46 ISD::ArgFlagsTy &ArgFlags,
51 ISD::ArgFlagsTy &ArgFlags,
1763 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument
1771 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
1798 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
3499 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in LowerCall_32SVR4() local
3503 Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, in LowerCall_32SVR4()
3507 ArgFlags, CCInfo); in LowerCall_32SVR4()