| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 321 BSWAP, CTTZ, CTLZ, CTPOP, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1114 SDValue CTPOP = N0; in SimplifySetCC() local
1117 CTPOP = N0.getOperand(0); in SimplifySetCC()
1119 if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP && in SimplifySetCC()
1120 (N0 == CTPOP || N0.getValueType().getSizeInBits() > in SimplifySetCC()
1121 Log2_32_Ceil(CTPOP.getValueType().getSizeInBits()))) { in SimplifySetCC()
1122 EVT CTVT = CTPOP.getValueType(); in SimplifySetCC()
1123 SDValue CTOp = CTPOP.getOperand(0); in SimplifySetCC()
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| D | SelectionDAGDumper.cpp | 276 case ISD::CTPOP: return "ctpop"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 61 case ISD::CTPOP: Res = PromoteIntRes_CTPOP(N); break; in PromoteIntegerResult()
325 return DAG.getNode(ISD::CTPOP, N->getDebugLoc(), Op.getValueType(), Op); in PromoteIntRes_CTPOP()
1115 case ISD::CTPOP: ExpandIntRes_CTPOP(N, Lo, Hi); break; in ExpandIntegerResult()
1741 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP()
1742 DAG.getNode(ISD::CTPOP, dl, NVT, Hi)); in ExpandIntRes_CTPOP()
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| D | LegalizeDAG.cpp | 2548 case ISD::CTPOP: { in ExpandBitCount()
2612 return DAG.getNode(ISD::CTPOP, dl, VT, Op); in ExpandBitCount()
2628 if (!TLI.isOperationLegalOrCustom(ISD::CTPOP, VT) && in ExpandBitCount()
2633 return DAG.getNode(ISD::CTPOP, dl, VT, Tmp3); in ExpandBitCount()
2728 case ISD::CTPOP: in ExpandNode()
3749 case ISD::CTPOP: in PromoteNode()
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| D | LegalizeVectorTypes.cpp | 69 case ISD::CTPOP: in ScalarizeVectorResult()
525 case ISD::CTPOP: in SplitVectorResult()
1058 case ISD::CTPOP: in SplitVectorOperand()
1424 case ISD::CTPOP: in WidenVectorResult()
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| D | LegalizeVectorOps.cpp | 217 case ISD::CTPOP: in LegalizeOp()
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| D | SelectionDAG.cpp | 1912 case ISD::CTPOP: { in ComputeMaskedBits()
2449 case ISD::CTPOP: in getNode()
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| D | DAGCombiner.cpp | 1128 case ISD::CTPOP: return visitCTPOP(N); in visit()
4078 return DAG.getNode(ISD::CTPOP, N->getDebugLoc(), VT, N0); in visitCTPOP()
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| D | SelectionDAGBuilder.cpp | 4983 setValue(&I, DAG.getNode(ISD::CTPOP, dl, Ty, Arg)); in visitIntrinsicCall()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 130 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering()
131 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | AMDILISelLowering.cpp | 146 setOperationAction(ISD::CTPOP, VT, Expand); in InitAMDILLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 767 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in SparcTargetLowering()
808 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in SparcTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1412 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in HexagonTargetLowering()
1413 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 175 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in MBlazeTargetLowering()
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1322 is rarely used. In ``SparcISelLowering.cpp``, the action for ``CTPOP`` (an
1329 setOperationAction(ISD::CTPOP, MVT::i32, Expand);
1332 setOperationAction(ISD::CTPOP, MVT::i32, Legal);
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 137 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in AArch64TargetLowering()
138 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in AArch64TargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 570 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom); in ARMTargetLowering()
571 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom); in ARMTargetLowering()
572 setOperationAction(ISD::CTPOP, MVT::v4i16, Custom); in ARMTargetLowering()
573 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); in ARMTargetLowering()
666 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in ARMTargetLowering()
3608 SDValue N1 = DAG.getNode(ISD::CTPOP, DL, VT8Bit, N0); in getCTPOP16BitCounts()
5591 case ISD::CTPOP: return LowerCTPOP(Op.getNode(), DAG, Subtarget); in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 354 def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 109 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in XCoreTargetLowering()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 290 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in MipsTargetLowering()
291 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in MipsTargetLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 162 setOperationAction(ISD::CTPOP, MVT::i32 , Expand); in PPCTargetLowering()
167 setOperationAction(ISD::CTPOP, MVT::i64 , Expand); in PPCTargetLowering()
379 setOperationAction(ISD::CTPOP, VT, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 441 setOperationAction(ISD::CTPOP , MVT::i8 , Promote); in X86TargetLowering()
443 setOperationAction(ISD::CTPOP , MVT::i8 , Expand); in X86TargetLowering()
444 setOperationAction(ISD::CTPOP , MVT::i16 , Expand); in X86TargetLowering()
445 setOperationAction(ISD::CTPOP , MVT::i32 , Expand); in X86TargetLowering()
447 setOperationAction(ISD::CTPOP , MVT::i64 , Expand); in X86TargetLowering()
790 setOperationAction(ISD::CTPOP, VT, Expand); in X86TargetLowering()
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