| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 248 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
250 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
252 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
266 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
268 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
270 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
284 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
286 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
288 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
290 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
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| D | ARMISelLowering.cpp | 112 setOperationAction(ISD::FP_TO_UINT, VT, Custom); in addTypeForNEON()
117 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
561 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); in ARMTargetLowering()
596 setTargetDAGCombine(ISD::FP_TO_UINT); in ARMTargetLowering()
831 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in ARMTargetLowering()
3253 case ISD::FP_TO_UINT: in LowerFP_TO_INT()
5574 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG); in LowerOperation()
9415 case ISD::FP_TO_UINT: return PerformVCVTCombine(N, DCI, Subtarget); in PerformDAGCombine()
|
| /external/llvm/test/CodeGen/X86/ |
| D | avx-fp2int.ll | 3 ;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 392 FP_TO_UINT, enumerator
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1150 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1155 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
1160 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in HexagonTargetLowering()
1165 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in HexagonTargetLowering()
1170 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Legal); in HexagonTargetLowering()
1184 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | R600ISelLowering.cpp | 46 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Expand); in R600TargetLowering()
70 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom); in R600TargetLowering()
448 case ISD::FP_TO_UINT: Results.push_back(LowerFPTOUINT(N->getOperand(0), DAG)); in ReplaceNodeResults()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 228 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 84 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
540 case ISD::FP_TO_UINT: in SplitVectorResult()
1061 case ISD::FP_TO_UINT: in SplitVectorOperand()
1414 case ISD::FP_TO_UINT: in WidenVectorResult()
2187 case ISD::FP_TO_UINT: in WidenVectorOperand()
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| D | LegalizeIntegerTypes.cpp | 98 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; in PromoteIntegerResult()
360 if (N->getOpcode() == ISD::FP_TO_UINT && in PromoteIntRes_FP_TO_XINT()
361 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
370 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ? in PromoteIntRes_FP_TO_XINT()
1119 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | LegalizeVectorOps.cpp | 227 case ISD::FP_TO_UINT: in LegalizeOp()
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| D | LegalizeFloatTypes.cpp | 613 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break; in SoftenFloatOperand()
1245 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break; in ExpandFloatOperand()
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| D | LegalizeDAG.cpp | 2478 if (TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NewOutTy)) { in PromoteLegalFP_TO_INT()
2479 OpToUse = ISD::FP_TO_UINT; in PromoteLegalFP_TO_INT()
2908 case ISD::FP_TO_UINT: { in ExpandNode()
3780 case ISD::FP_TO_UINT: in PromoteNode()
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| D | DAGCombiner.cpp | 1149 case ISD::FP_TO_UINT: return visitFP_TO_UINT(N); in visit()
6474 return DAG.getNode(ISD::FP_TO_UINT, N->getDebugLoc(), VT, N0); in visitFP_TO_UINT()
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| D | SelectionDAG.cpp | 2497 case ISD::FP_TO_UINT: { in getNode()
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| D | SelectionDAGBuilder.cpp | 2800 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurDebugLoc(), DestVT, N)); in visitFPToUI()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 237 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in AArch64TargetLowering()
238 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in AArch64TargetLowering()
239 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom); in AArch64TargetLowering()
2321 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG, false); in LowerOperation()
|
| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 77 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in MBlazeTargetLowering()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1219 case FPToUI: return ISD::FP_TO_UINT; in InstructionOpcodeToISD()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 286 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
291 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
299 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
408 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
5564 case ISD::FP_TO_UINT: in LowerOperation()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 726 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 314 setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); in X86TargetLowering()
315 setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); in X86TargetLowering()
316 setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); in X86TargetLowering()
319 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand); in X86TargetLowering()
320 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); in X86TargetLowering()
327 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand); in X86TargetLowering()
331 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom); in X86TargetLowering()
337 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom); in X86TargetLowering()
807 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in X86TargetLowering()
12130 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG); in LowerOperation()
[all …]
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 393 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 287 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in MipsTargetLowering()
288 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in MipsTargetLowering()
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