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Searched refs:MIOperandInfo (Results 1 – 24 of 24) sorted by relevance

/external/llvm/utils/TableGen/
DCodeGenInstruction.h101 DagInit *MIOperandInfo; member
112 MIOperandInfo(MIOI) {} in OperandInfo()
DCodeGenInstruction.cpp184 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; in ParseOperandName()
578 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
597 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
DInstrInfoEmitter.cpp85 DagInit *MIOI = Inst.Operands[i].MIOperandInfo; in GetOperandInfo()
DAsmMatcherEmitter.cpp1000 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef(); in getOperandClass()
/external/llvm/lib/Target/ARM/
DARMInstrThumb.td136 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
152 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
160 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
168 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
180 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
192 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
204 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
218 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
DARMInstrInfo.td510 let MIOperandInfo = (ops GPRnopc, GPRnopc, i32imm);
521 let MIOperandInfo = (ops GPR, i32imm);
532 let MIOperandInfo = (ops GPR, GPR, i32imm);
543 let MIOperandInfo = (ops GPR, i32imm);
754 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
766 let MIOperandInfo = (ops GPR:$base, GPRnopc:$offsreg, i32imm:$shift);
778 let MIOperandInfo = (ops i32imm);
790 let MIOperandInfo = (ops i32imm);
805 let MIOperandInfo = (ops GPRnopc, i32imm);
820 let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
[all …]
DARMInstrNEON.td65 let MIOperandInfo = (ops i32imm);
72 let MIOperandInfo = (ops i32imm);
79 let MIOperandInfo = (ops i32imm);
224 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
234 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
244 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
255 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
265 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
275 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
285 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
[all …]
DARMInstrThumb2.td52 let MIOperandInfo = (ops rGPR, i32imm);
157 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
187 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
198 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
209 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
227 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
246 let MIOperandInfo = (ops GPRnopc:$base, i32imm:$offsimm);
257 let MIOperandInfo = (ops GPR:$base, rGPR:$offsreg, i32imm:$offsimm);
265 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm);
271 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm);
/external/llvm/lib/Target/Hexagon/
DHexagonOperands.td819 let MIOperandInfo = (ops IntRegs, IntRegs);
824 let MIOperandInfo = (ops IntRegs, IntRegs);
830 let MIOperandInfo = (ops IntRegs, s11Imm);
835 let MIOperandInfo = (ops IntRegs, s11Imm);
/external/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td231 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
237 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
DX86InstrInfo.td323 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
358 let MIOperandInfo = (ops ptr_rc, i8imm, VR128, i32imm, i8imm);
361 let MIOperandInfo = (ops ptr_rc, i8imm, VR256, i32imm, i8imm);
364 let MIOperandInfo = (ops ptr_rc, i8imm, VR128, i32imm, i8imm);
367 let MIOperandInfo = (ops ptr_rc, i8imm, VR256, i32imm, i8imm);
375 let MIOperandInfo = (ops GR64_NOREX, i8imm, GR64_NOREX_NOSP, i32imm, i8imm);
389 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall,
400 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm,
524 let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm, i8imm);
531 let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm, i8imm);
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td256 let MIOperandInfo = (ops CPURegs, simm16);
263 let MIOperandInfo = (ops CPU64Regs, simm16_64);
270 let MIOperandInfo = (ops CPURegs, simm16);
276 let MIOperandInfo = (ops CPU64Regs, simm16_64);
DMips16InstrInfo.td24 let MIOperandInfo = (ops CPU16Regs, simm16, CPU16Regs);
30 let MIOperandInfo = (ops CPU16Regs, simm16);
/external/llvm/include/llvm/Target/
DTarget.td563 dag MIOperandInfo = (ops);
621 /// instruction. OpTypes specifies the MIOperandInfo for the operand, and
626 let MIOperandInfo = OpTypes;
634 let MIOperandInfo = OpTypes;
/external/llvm/lib/Target/Sparc/
DSparcInstrInfo.td72 let MIOperandInfo = (ops IntRegs, IntRegs);
76 let MIOperandInfo = (ops IntRegs, i32imm);
/external/llvm/lib/Target/R600/
DR600Instructions.td58 let MIOperandInfo = (ops R600_TReg32_X:$ptr, i32imm:$index);
63 let MIOperandInfo = (ops R600_Reg32:$ptr, R600_Reg32:$index);
95 let MIOperandInfo = (ops R600_Reg32:$ptr, i32imm:$index);
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td33 let MIOperandInfo = (ops i32imm:$imm);
38 let MIOperandInfo = (ops symbolLo64:$off, ptr_rc:$reg);
DPPCInstrInfo.td381 let MIOperandInfo = (ops symbolLo:$imm, ptr_rc:$reg);
386 let MIOperandInfo = (ops ptr_rc:$offreg, ptr_rc:$ptrreg);
390 let MIOperandInfo = (ops symbolLo:$imm, ptr_rc:$reg);
/external/llvm/lib/Target/MBlaze/
DMBlazeInstrInfo.td103 let MIOperandInfo = (ops GPR, simm16);
109 let MIOperandInfo = (ops GPR, GPR);
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td76 let MIOperandInfo = (ops GR16, i16imm);
81 let MIOperandInfo = (ops GR16, i16imm);
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td546 // InOperandList (expanded by ComplexPatterns and MIOperandInfo) was functional,
553 // the cmp/cmn aliases didn't use the MIOperandInfo to determine how operands
1140 // MIOperandInfo *might* have been able to do it, but at the cost of
3875 let MIOperandInfo = (ops uimm16:$UImm16, imm:$Shift);
3943 let MIOperandInfo = (ops uimm16:$UImm16, imm:$Shift);
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td186 let MIOperandInfo = (ops i32imm, i32imm);
/external/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td1223 let MIOperandInfo = (ops Int32Regs, i32imm);
1227 let MIOperandInfo = (ops Int64Regs, i64imm);
/external/llvm/docs/
DWritingAnLLVMBackend.rst772 let MIOperandInfo = (ops IntRegs, IntRegs);