Searched refs:MemIndexedMode (Results 1 – 19 of 19) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 688 enum MemIndexedMode { enum
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| D | SelectionDAGNodes.h | 622 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
1599 unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM,
1615 ISD::MemIndexedMode getAddressingMode() const {
1616 return ISD::MemIndexedMode((SubclassData >> 2) & 7);
1636 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1666 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
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| D | SelectionDAG.h | 707 SDValue Offset, ISD::MemIndexedMode AM);
708 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
715 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
736 SDValue Offset, ISD::MemIndexedMode AM);
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 170 ISD::MemIndexedMode &AM,
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| D | MSP430ISelDAGToDAG.cpp | 303 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
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| D | MSP430ISelLowering.cpp | 989 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 147 ISD::MemIndexedMode &AM,
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| D | HexagonISelDAGToDAG.cpp | 621 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
760 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
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| D | HexagonISelLowering.cpp | 641 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 323 ISD::MemIndexedMode &AM,
331 ISD::MemIndexedMode &AM,
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| D | ARMISelDAGToDAG.cpp | 811 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
847 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
867 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
940 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1026 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1342 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1415 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectARMIndexedLoad()
1488 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectT2IndexedLoad()
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| D | ARMISelLowering.cpp | 9864 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
9903 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 342 ISD::MemIndexedMode &AM,
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| D | PPCISelLowering.cpp | 1180 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 761 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
771 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
797 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
803 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
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| D | TargetLowering.h | 1683 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
1693 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 320 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
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| D | SelectionDAG.cpp | 511 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, in encodeMemSDNodeFlags()
4363 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
4396 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
4470 SDValue Offset, ISD::MemIndexedMode AM) { in getIndexedLoad()
4603 SDValue Offset, ISD::MemIndexedMode AM) { in getIndexedStore()
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| D | DAGCombiner.cpp | 6961 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore()
7180 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
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