Searched refs:SETUNE (Results 1 – 20 of 20) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 166 case FCmpInst::FCMP_UNE: return ISD::SETUNE; in getFCmpCondCode()
175 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 745 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 582 case ISD::SETUNE: in getPredicateForSetCC()
622 case ISD::SETUNE: in getCRIdxForSetCC()
644 case ISD::SETUNE: in getVCmpInst()
815 case ISD::SETUNE: { in SelectSETCC()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstructions.td | 49 case ISD::SETONE: case ISD::SETUNE:
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| D | AMDGPUISelLowering.cpp | 200 case ISD::SETUNE: in LowerMinMax()
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| D | R600ISelLowering.cpp | 593 case ISD::SETUNE: in LowerSELECT_CC()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeInstrFPU.td | 185 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETUNE),
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 303 case ISD::SETUNE: return "setune"; in getOperationName()
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| D | TargetLowering.cpp | 118 case ISD::SETUNE: in softenSetCCOperands()
1584 if (Cond == ISD::SETUNE && in SimplifySetCC()
1597 if (Cond == ISD::SETUNE && in SimplifySetCC()
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| D | LegalizeDAG.cpp | 1617 assert(TLI.getCondCodeAction(ISD::SETUNE, OpVT) in LegalizeSetCCCondCode()
1620 CC1 = ISD::SETUNE; CC2 = ISD::SETUNE; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
1628 case ISD::SETUNE: in LegalizeSetCCCondCode()
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| D | LegalizeFloatTypes.cpp | 1291 LHSHi, RHSHi, ISD::SETUNE); in FloatExpandSetCCOperands()
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| D | SelectionDAG.cpp | 286 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT in getSetCCOrOperation()
1576 case ISD::SETUNE: in FoldSetCC()
1637 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); in FoldSetCC()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 502 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
855 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 670 case ISD::SETUNE: return SPCC::FCC_NE; in FPCondCCodeToFCC()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1262 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1177 case ISD::SETUNE: CondCode = ARMCC::NE; break; in FPCCToARMCC()
3108 else if (CC == ISD::SETUNE) in OptimizeVFPBrcond()
3160 CC == ISD::SETNE || CC == ISD::SETUNE)) { in LowerBR_CC()
3786 case ISD::SETUNE: in LowerVSETCC()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXVector.td | 978 (setcc node:$lhs, node:$rhs, SETUNE)>;
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 251 setCondCodeAction(ISD::SETUNE, MVT::f32, Expand); in X86TargetLowering()
252 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in X86TargetLowering()
253 setCondCodeAction(ISD::SETUNE, MVT::f80, Expand); in X86TargetLowering()
3273 case ISD::SETUNE: return X86::COND_INVALID; in TranslateX86CC()
9282 case ISD::SETUNE: in LowerVSETCC()
9958 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETUNE) { in LowerBRCOND()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1654 case ISD::SETUNE: CondCode = A64CC::NE; break; in FPCCToA64CC()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 625 case ISD::SETUNE: return Mips::FCOND_UNE; in FPCondCCodeToFCC()
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