Home
last modified time | relevance | path

Searched refs:regsOverlap (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/CodeGen/
DImplicitNullChecks.cpp192 if (TRI.regsOverlap(Reg, MO.getReg())) in isSafeToHoist()
197 if (TRI.regsOverlap(Reg, MO.getReg())) in isSafeToHoist()
DProcessImplicitDefs.cpp108 !TRI->regsOverlap(Reg, UserReg)) in processImplicitDef()
DCriticalAntiDepBreaker.cpp409 if (TRI->regsOverlap(NewReg, *it)) { in findSuitableFreeRegister()
602 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
DMachineInstrBundle.cpp315 if (!TRI->regsOverlap(MOReg, Reg)) in analyzePhysReg()
DRegAllocPBQP.cpp385 if (TRI.regsOverlap(PRegN, PRegM)) { in createInterferenceEdge()
549 if (TRI.regsOverlap(reg, CSR[i])) in isACalleeSavedRegister()
DMachineCSE.cpp195 if (!TRI->regsOverlap(MO.getReg(), Reg)) in isPhysDefTriviallyDead()
DMachineInstr.cpp1248 Found = TRI->regsOverlap(MOReg, Reg); in findRegisterDefOperandIdx()
1977 [&](unsigned Use) { return TRI.regsOverlap(Use, Reg); })) in setPhysRegsDeadExcept()
DTwoAddressInstructionPass.cpp539 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
/external/llvm/lib/Target/AArch64/
DAArch64DeadRegisterDefinitionsPass.cpp68 if (TRI->regsOverlap(Reg, MO.getReg())) in implicitlyDefinesOverlappingReg()
DAArch64PBQPRegAlloc.cpp197 if (livesOverlap && TRI->regsOverlap(pRd, pRa)) in addIntraChainConstraint()
DAArch64AsmPrinter.cpp245 assert(RI->regsOverlap(RegToPrint, Reg)); in printAsmRegInClass()
/external/llvm/lib/Target/X86/
DX86CallFrameOptimization.cpp300 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister())) in classifyInstruction()
304 if (RegInfo.regsOverlap(Reg, U)) in classifyInstruction()
DX86FrameLowering.cpp1818 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h397 bool regsOverlap(unsigned regA, unsigned regB) const { in regsOverlap() function
/external/llvm/lib/Target/SystemZ/
DSystemZElimCompare.cpp135 if (TRI->regsOverlap(MOReg, Reg)) { in getRegReferences()
/external/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1592 (TRI->regsOverlap(EvenReg, BaseReg))) { in FixInvalidRegPairOp()
1593 assert(!TRI->regsOverlap(OddReg, BaseReg)); in FixInvalidRegPairOp()
1682 if (TRI->regsOverlap(Reg, E.MI->getOperand(0).getReg())) { in LoadStoreMultipleOpti()
1975 if (MO.isDef() && TRI->regsOverlap(Reg, Base)) in IsSafeAndProfitableToMove()
DARMBaseInstrInfo.cpp803 if (TRI->regsOverlap(SrcReg, TRI->getSubReg(DestReg, BeginIdx))) { in copyPhysReg()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp2746 if (TRI->regsOverlap(*ImpDef, PI->getReg()) && in canClobberReachingPhysRegUse()
2785 if (TRI->regsOverlap(Reg, SUReg)) in canClobberPhysRegDefs()