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Searched refs:XMM6 (Results 1 – 25 of 40) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dsse_xform4.S72 MOVAPS( MAT(8), XMM6 ) /* m11 | m10 | m9 | m8 */
88 MULPS( XMM6, XMM2 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
158 MOVSS( SRC(2), XMM6 ) /* oz */
159 SHUFPS( CONST(0x0), XMM6, XMM6 ) /* oz | oz | oz | oz */
160 MULPS( XMM2, XMM6 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
167 ADDPS( XMM6, XMM4 ) /* ox*m3+oy*m7+oz*m11 | ... */
Dsse_xform3.S89 MOVSS ( REGOFF(8, ESI), XMM6 ) /* | | | oz */
90 SHUFPS ( CONST(0x0), XMM6, XMM6 ) /* oz | oz | oz | oz */
94 MULPS ( XMM2, XMM6 ) /* m11*oz | m10*oz | m9*oz | m8*oz */
97 ADDPS ( XMM6, XMM4 )
275 XORPS ( XMM6, XMM6 ) /* 0 */
293 MOVSS ( XMM6, XMM5 ) /* 0 */
485 MOVSS( S(2), XMM6 )
486 SHUFPS( CONST(0x0), XMM6, XMM6 ) /* oz | oz | oz */
487 MULPS( XMM2, XMM6 ) /* oz*m10 | oz*m9 | oz*m8 */
490 ADDPS( XMM6, XMM4 ) /* + | + | + */
Dsse_normal.S155 MOVSS ( M(8), XMM6 ) /* m8 */
156 MULSS ( ARG_SCALE, XMM6 ) /* m8*scale */
182 MULSS ( XMM6, XMM5 ) /* ux*m8*scale */
/external/swiftshader/third_party/LLVM/test/TableGen/
DSlice.td47 def XMM6: Register<"xmm6">;
59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
Dcast.td47 def XMM6: Register<"xmm6">;
59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DTargetInstrSpec.td48 def XMM6: Register<"xmm6">;
60 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td56 def XMM6: Register<"xmm6">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/TableGen/
DTargetInstrSpec.td53 def XMM6: Register<"xmm6">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DSlice.td46 def XMM6: Register<"xmm6">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
Dcast.td52 def XMM6: Register<"xmm6">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td56 def XMM6: Register<"xmm6">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrControl.td143 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
182 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
218 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
279 // AMD64 cc clobbers RSI, RDI, XMM6-XMM15.
DX86GenRegisterInfo.inc153 XMM6 = 134,
382 const unsigned XMM6_Overlaps[] = { X86::XMM6, X86::YMM6, 0 };
398 const unsigned YMM6_Overlaps[] = { X86::YMM6, X86::XMM6, 0 };
481 const unsigned YMM6_SubRegsSet[] = { X86::XMM6, 0 };
699 { "XMM6", XMM6_Overlaps, XMM6_SubRegsSet, XMM6_SuperRegsSet },
770 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
790 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
810 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
1220 RI->mapDwarfRegToLLVMReg(23, X86::XMM6, false );
1263 RI->mapDwarfRegToLLVMReg(27, X86::XMM6, false );
[all …]
DX86RegisterInfo.td174 def XMM6: Register<"xmm6">, DwarfRegNum<[23, 27, 27]>;
197 def YMM6: RegisterWithSubRegs<"ymm6", [XMM6]>, DwarfRegAlias<XMM6>;
DX86CallingConv.td159 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>,
237 CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>
DX86GenCallingConv.inc548 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
653 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dghc-cc64.ll21 @d2 = external global double ; assigned to register: XMM6
/external/llvm/test/CodeGen/X86/
Dghc-cc64.ll21 @d2 = external global double ; assigned to register: XMM6
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h213 ENTRY(XMM6) \
/external/libvpx/libvpx/vpx_ports/
Dx86_abi_support.asm318 ; Win64 ABI requires that XMM6:XMM15 are callee saved
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h223 ENTRY(XMM6) \
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp197 case X86::XMM6: case X86::XMM14: in getX86RegNum()
/external/valgrind/memcheck/
Dmc_machine.c725 if (o >= GOF(XMM6) && o+sz <= GOF(XMM6)+SZB(XMM6)) return GOF(XMM6); in get_otrack_shadow_offset_wrk()
/external/llvm/lib/Target/X86/
DX86CallingConv.td333 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>,
468 CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>
/external/llvm/docs/TableGen/
Dindex.rst70 XMM6, XMM7, XMM8, XMM9,

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