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Searched refs:untyped (Results 1 – 25 of 57) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.td629 def VOP3Mods0 : ComplexPattern<untyped, 4, "SelectVOP3Mods0">;
630 def VOP3NoMods0 : ComplexPattern<untyped, 4, "SelectVOP3NoMods0">;
631 def VOP3Mods0Clamp : ComplexPattern<untyped, 3, "SelectVOP3Mods0Clamp">;
632 def VOP3Mods0Clamp0OMod : ComplexPattern<untyped, 4, "SelectVOP3Mods0Clamp0OMod">;
633 def VOP3Mods : ComplexPattern<untyped, 2, "SelectVOP3Mods">;
634 def VOP3NoMods : ComplexPattern<untyped, 2, "SelectVOP3NoMods">;
1139 !if (!eq(Src0.Value, untyped.Value), 0,
1140 !if (!eq(Src1.Value, untyped.Value), 1, // VOP1
1141 !if (!eq(Src2.Value, untyped.Value), 2, // VOP2
1438 field bit HasDst = !if(!eq(DstVT.Value, untyped.Value), 0, 1);
[all …]
DSIRegisterInfo.td319 def VReg_96 : RegisterClass<"AMDGPU", [untyped], 32, (add VGPR_96)> {
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DValueTypes.td61 def untyped: ValueType<8 , 36>; // Produces an untyped value
DValueTypes.h86 untyped = 36, // This value takes a register, but has enumerator
/external/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.td111 // register pairs as untyped instead.
112 defm GR128 : SystemZRegClass<"GR128", [untyped], 128,
122 defm ADDR128 : SystemZRegClass<"ADDR128", [untyped], 128, (sub GR128Bit, R0Q)>;
276 def v128any : TypedReg<untyped, VR128>;
DSystemZOperators.td42 [SDTCisVT<0, untyped>,
43 SDTCisVT<1, untyped>,
46 [SDTCisVT<0, untyped>,
47 SDTCisVT<1, untyped>,
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td389 def FPR8 : RegisterClass<"AArch64", [untyped], 8, (sequence "B%u", 0, 31)> {
421 def DD : RegisterClass<"AArch64", [untyped], 64, (add DSeqPairs)> {
424 def DDD : RegisterClass<"AArch64", [untyped], 64, (add DSeqTriples)> {
427 def DDDD : RegisterClass<"AArch64", [untyped], 64, (add DSeqQuads)> {
439 def QQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqPairs)> {
442 def QQQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqTriples)> {
445 def QQQQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqQuads)> {
610 def WSeqPairsClass : RegisterClass<"AArch64", [untyped], 32,
614 def XSeqPairsClass : RegisterClass<"AArch64", [untyped], 64,
/external/llvm/include/llvm/CodeGen/
DValueTypes.td98 def untyped: ValueType<8 , 67>; // Produces an untyped value
/external/protobuf/src/google/protobuf/compiler/js/
Djs_generator.cc2187 bool untyped = in GenerateClassField() local
2204 if (untyped) { in GenerateClassField()
2226 if (untyped) { in GenerateClassField()
2270 if (untyped) { in GenerateClassField()
2284 if (field->type() == FieldDescriptor::TYPE_BYTES && !untyped) { in GenerateClassField()
2289 if (untyped) { in GenerateClassField()
2318 untyped ? "/** @type{string|number|boolean|Array|undefined} */(" : "", in GenerateClassField()
2319 "typeclose", untyped ? ")" : "", in GenerateClassField()
2326 if (untyped) { in GenerateClassField()
/external/llvm/lib/Target/Mips/
DMipsRegisterInfo.td430 def ACC64 : RegisterClass<"Mips", [untyped], 64, (add AC0)> {
434 def ACC128 : RegisterClass<"Mips", [untyped], 128, (add AC0_64)> {
438 def ACC64DSP : RegisterClass<"Mips", [untyped], 64, (sequence "AC%u", 0, 3)> {
DMipsDSPInstrInfo.td25 SDTCisVT<2, untyped>]>;
26 def SDT_MipsShilo : SDTypeProfile<1, 2, [SDTCisVT<0, untyped>,
28 def SDT_MipsDPA : SDTypeProfile<1, 3, [SDTCisVT<0, untyped>, SDTCisSameAs<0, 3>,
DMipsInstrInfo.td26 def SDT_MFLOHI : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVT<1, untyped>]>;
27 def SDT_MTLOHI : SDTypeProfile<1, 2, [SDTCisVT<0, untyped>,
29 def SDT_MipsMultDiv : SDTypeProfile<1, 2, [SDTCisVT<0, untyped>, SDTCisInt<1>,
32 [SDTCisVT<0, untyped>, SDTCisSameAs<0, 3>,
/external/swiftshader/third_party/LLVM/lib/VMCore/
DValueTypes.cpp142 case MVT::untyped: return "untyped"; in getEVTString()
/external/hamcrest/
DCHANGES.txt37 * Fix issue 59 - add untyped version of equalTo, named equalToObject
/external/v8/src/compiler/
Dpipeline.cc406 void RunPrintAndVerify(const char* phase, bool untyped = false);
1462 void Run(PipelineData* data, Zone* temp_zone, const bool untyped, in Run()
1464 Verifier::Run(data->graph(), !untyped ? Verifier::TYPED : Verifier::UNTYPED, in Run()
1469 void PipelineImpl::RunPrintAndVerify(const char* phase, bool untyped) { in RunPrintAndVerify() argument
1474 Run<VerifyGraphPhase>(untyped); in RunPrintAndVerify()
/external/llvm/lib/Target/ARM/
DARMRegisterInfo.td353 def GPRPair : RegisterClass<"ARM", [untyped], 64, (add Tuples2R)> {
364 def DTriple : RegisterClass<"ARM", [untyped], 64, (add Tuples3D)> {
419 def DTripleSpc : RegisterClass<"ARM", [untyped], 64, (add Tuples3DSpc)> {
/external/swiftshader/third_party/LLVM/utils/TableGen/
DCodeGenTarget.cpp93 case MVT::untyped: return "MVT::untyped"; in getEnumName()
/external/flatbuffers/docs/source/
DInternals.md333 Since this is an untyped vector `SL_VECTOR`, it is followed by 3 type
391 A map (`TYPE_MAP`) is like an (untyped) vector, but with 2 prefixes before the
/external/antlr/antlr-3.4/tool/src/main/antlr3/org/antlr/grammar/v3/
DAssignTokenTypesWalker.g75 * 6. Walks literals, assigning types if untyped
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DMachineLICM.cpp673 if (VT == MVT::untyped) { in getRegisterClassIDAndCost()
/external/llvm/docs/
DMIRLangRef.rst365 The immediate machine operands are untyped, 64-bit signed integers. The
/external/bison/po/
Dnl.po679 # betere vertaling voor 'untyped'?
682 msgid "explicit type given in untyped grammar"
Dpt.po615 msgid "explicit type given in untyped grammar"
Dbison.pot613 msgid "explicit type given in untyped grammar"
/external/bison/
DNEWS241 will display two values for each typed and untyped symbol (provided
1592 action is valid when $$ is untyped, and $1 typed:
1594 untyped: ... typed;
1598 typed: ... untyped;

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