| /drivers/net/ |
| D | atp.c | 619 int status = read_nibble(ioaddr, ISR); in atp_interrupt()
624 write_reg(ioaddr, ISR, ISR_RxOK); /* Clear the Rx interrupt. */ in atp_interrupt()
637 write_reg_high(ioaddr, ISR, ISRh_RxErr); in atp_interrupt()
650 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK); in atp_interrupt()
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| D | fealnx.c | 175 ISR = 0x34, /* interrupt status */ enumerator
910 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in netdev_open()
1103 "config %8.8x.\n", dev->name, ioread32(ioaddr + ISR), in netdev_timer()
1174 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in enable_rxtx()
1213 " resetting...\n", dev->name, ioread32(ioaddr + ISR)); in fealnx_tx_timeout()
1452 u32 intr_status = ioread32(ioaddr + ISR); in intr_handler()
1455 iowrite32(intr_status, ioaddr + ISR); in intr_handler()
1601 dev->name, ioread32(ioaddr + ISR)); in intr_handler()
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| D | via-velocity.h | 994 volatile __le32 ISR; /* 0x24 */ member
1155 #define mac_read_isr(regs) readl(&((regs)->ISR))
1156 #define mac_write_isr(regs, x) writel((x),&((regs)->ISR))
1157 #define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR))
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| D | atp.h | 40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
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| D | macb.c | 567 status = macb_readl(bp, ISR); in macb_interrupt()
611 status = macb_readl(bp, ISR); in macb_interrupt()
795 macb_readl(bp, ISR); in macb_reset_hw()
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| D | ns83820.c | 325 #define ISR 0x10 macro
1427 isr = readl(dev->base + ISR);
1601 isr = readl(dev->base + ISR);
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| D | via-velocity.c | 3388 BYTE_REG_BITS_OFF(ISR_PWEI, ®s->ISR); in velocity_set_wol()
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| /drivers/rtc/ |
| D | rtc-at32ap700x.c | 100 alrm->pending = rtc_readl(rtc, ISR) & RTC_BIT(ISR_TOPI) ? 1 : 0; in at32_rtc_readalarm()
174 unsigned long isr = rtc_readl(rtc, ISR); in at32_rtc_interrupt()
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| /drivers/usb/serial/ |
| D | io_16654.h | 37 #define ISR 2 // Interrupt Status Register (Read) macro
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| /drivers/net/irda/ |
| D | w83977af_ir.h | 59 #define ISR 0x02 /* Interrupt status register */ macro
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| D | w83977af_ir.c | 1128 isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */ in w83977af_interrupt()
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| /drivers/staging/rtl8187se/ |
| D | r8180_hw.h | 263 #define ISR 0x003C macro
273 #define ISR 0x003E macro
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| D | r8180_core.c | 6435 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6436 write_nic_dword(dev,ISR,inta); // reset int situation
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| /drivers/video/i810/ |
| D | i810_regs.h | 47 #define ISR 0x020AC macro
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| /drivers/media/common/ |
| D | saa7146_core.c | 301 ack_isr = isr = saa7146_read(dev, ISR); in interrupt_hw()
346 saa7146_write(dev, ISR, ack_isr); in interrupt_hw()
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| /drivers/atm/ |
| D | firestream.h | 295 #define ISR 0x64 macro
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| D | firestream.c | 1567 status = read_fs (dev, ISR); in fs_irq()
1709 isr = read_fs (dev, ISR); in fs_init()
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| /drivers/gpu/drm/i915/ |
| D | i915_reg.h | 236 #define ISR 0x020ac macro
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| /drivers/net/wireless/ipw2x00/ |
| D | Kconfig | 145 debug option enables debug on hot paths (e.g Tx, Rx, ISR) and
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| /drivers/char/pcmcia/ |
| D | synclink_cs.c | 284 #define ISR 0x3a macro
1242 isr = read_reg16(info, CHB + ISR); in mgslpc_isr()
1250 isr = read_reg16(info, CHA + ISR); in mgslpc_isr()
3319 read_reg16(info, CHA + ISR); /* clear pending IRQs */ in hdlc_mode()
3637 read_reg16(info, CHA + ISR); /* clear pending IRQs */ in async_mode()
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| /drivers/serial/ |
| D | sc26xx.c | 223 isr = READ_SC(&up->port[0], ISR); in sc26xx_interrupt()
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| /drivers/i2c/busses/ |
| D | i2c-pxa.c | 48 #define ISR (0x18) macro
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| /drivers/net/wan/ |
| D | dscc4.c | 271 #define ISR 0x58 macro
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| /drivers/scsi/aic7xxx/ |
| D | aic79xx.seq | 1870 * First instruction in an ISR cannot be a branch on
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