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Searched refs:clk (Results 1 – 25 of 689) sorted by relevance

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/drivers/clk/ux500/
Du8500_clk.c22 struct clk *clk; in u8500_clk_init() local
25 clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0, in u8500_clk_init()
27 clk_register_clkdev(clk, "soc0_pll", NULL); in u8500_clk_init()
29 clk = clk_reg_prcmu_gate("soc1_pll", NULL, PRCMU_PLLSOC1, in u8500_clk_init()
31 clk_register_clkdev(clk, "soc1_pll", NULL); in u8500_clk_init()
33 clk = clk_reg_prcmu_gate("ddr_pll", NULL, PRCMU_PLLDDR, in u8500_clk_init()
35 clk_register_clkdev(clk, "ddr_pll", NULL); in u8500_clk_init()
39 clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL", in u8500_clk_init()
42 clk_register_clkdev(clk, "clk32k", NULL); in u8500_clk_init()
43 clk_register_clkdev(clk, "apb_pclk", "rtc-pl031"); in u8500_clk_init()
[all …]
Dclk-prcmu.c33 struct clk_prcmu *clk = to_clk_prcmu(hw); in clk_prcmu_prepare() local
35 ret = prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_prepare()
37 clk->is_prepared = 1; in clk_prcmu_prepare()
44 struct clk_prcmu *clk = to_clk_prcmu(hw); in clk_prcmu_unprepare() local
45 if (prcmu_request_clock(clk->cg_sel, false)) in clk_prcmu_unprepare()
47 __clk_get_name(hw->clk)); in clk_prcmu_unprepare()
49 clk->is_prepared = 0; in clk_prcmu_unprepare()
54 struct clk_prcmu *clk = to_clk_prcmu(hw); in clk_prcmu_is_prepared() local
55 return clk->is_prepared; in clk_prcmu_is_prepared()
60 struct clk_prcmu *clk = to_clk_prcmu(hw); in clk_prcmu_enable() local
[all …]
Dclk-sysctrl.c39 struct clk_sysctrl *clk = to_clk_sysctrl(hw); in clk_sysctrl_prepare() local
41 ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0], in clk_sysctrl_prepare()
42 clk->reg_bits[0]); in clk_sysctrl_prepare()
44 if (!ret && clk->enable_delay_us) in clk_sysctrl_prepare()
45 usleep_range(clk->enable_delay_us, clk->enable_delay_us); in clk_sysctrl_prepare()
52 struct clk_sysctrl *clk = to_clk_sysctrl(hw); in clk_sysctrl_unprepare() local
53 if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0])) in clk_sysctrl_unprepare()
54 dev_err(clk->dev, "clk_sysctrl: %s fail to clear %s.\n", in clk_sysctrl_unprepare()
55 __func__, __clk_get_name(hw->clk)); in clk_sysctrl_unprepare()
61 struct clk_sysctrl *clk = to_clk_sysctrl(hw); in clk_sysctrl_recalc_rate() local
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Dclk-prcc.c39 struct clk_prcc *clk = to_clk_prcc(hw); in clk_prcc_pclk_enable() local
41 writel(clk->cg_sel, (clk->base + PRCC_PCKEN)); in clk_prcc_pclk_enable()
42 while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel)) in clk_prcc_pclk_enable()
45 clk->is_enabled = 1; in clk_prcc_pclk_enable()
51 struct clk_prcc *clk = to_clk_prcc(hw); in clk_prcc_pclk_disable() local
53 writel(clk->cg_sel, (clk->base + PRCC_PCKDIS)); in clk_prcc_pclk_disable()
54 clk->is_enabled = 0; in clk_prcc_pclk_disable()
59 struct clk_prcc *clk = to_clk_prcc(hw); in clk_prcc_kclk_enable() local
61 writel(clk->cg_sel, (clk->base + PRCC_KCKEN)); in clk_prcc_kclk_enable()
62 while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel)) in clk_prcc_kclk_enable()
[all …]
/drivers/clk/
Dclk.c102 static void clk_summary_show_one(struct seq_file *s, struct clk *c, int level) in clk_summary_show_one()
114 static void clk_summary_show_subtree(struct seq_file *s, struct clk *c, in clk_summary_show_subtree()
117 struct clk *child; in clk_summary_show_subtree()
130 struct clk *c; in clk_summary_show()
161 static void clk_dump_one(struct seq_file *s, struct clk *c, int level) in clk_dump_one()
172 static void clk_dump_subtree(struct seq_file *s, struct clk *c, int level) in clk_dump_subtree()
174 struct clk *child; in clk_dump_subtree()
191 struct clk *c; in clk_dump()
230 static int clk_debug_create_one(struct clk *clk, struct dentry *pdentry) in clk_debug_create_one() argument
235 if (!clk || !pdentry) { in clk_debug_create_one()
[all …]
Dclkdev.c28 struct clk *of_clk_get(struct device_node *np, int index) in of_clk_get()
31 struct clk *clk; in of_clk_get() local
42 clk = of_clk_get_from_provider(&clkspec); in of_clk_get()
44 return clk; in of_clk_get()
57 struct clk *of_clk_get_by_name(struct device_node *np, const char *name) in of_clk_get_by_name()
59 struct clk *clk = ERR_PTR(-ENOENT); in of_clk_get_by_name() local
72 clk = of_clk_get(np, index); in of_clk_get_by_name()
73 if (!IS_ERR(clk)) in of_clk_get_by_name()
78 return clk; in of_clk_get_by_name()
91 return clk; in of_clk_get_by_name()
[all …]
Dclk-u300.c349 static struct clk * __init
357 struct clk *clk; in syscon_clk_register() local
382 clk = clk_register(dev, &sclk->hw); in syscon_clk_register()
383 if (IS_ERR(clk)) in syscon_clk_register()
386 return clk; in syscon_clk_register()
564 static struct clk * __init
568 struct clk *clk; in mclk_clk_register() local
586 clk = clk_register(dev, &mclk->hw); in mclk_clk_register()
587 if (IS_ERR(clk)) in mclk_clk_register()
590 return clk; in mclk_clk_register()
[all …]
Dclk-nomadik.c14 struct clk *clk; in nomadik_clk_init() local
16 clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); in nomadik_clk_init()
17 clk_register_clkdev(clk, "apb_pclk", NULL); in nomadik_clk_init()
18 clk_register_clkdev(clk, NULL, "gpio.0"); in nomadik_clk_init()
19 clk_register_clkdev(clk, NULL, "gpio.1"); in nomadik_clk_init()
20 clk_register_clkdev(clk, NULL, "gpio.2"); in nomadik_clk_init()
21 clk_register_clkdev(clk, NULL, "gpio.3"); in nomadik_clk_init()
22 clk_register_clkdev(clk, NULL, "rng"); in nomadik_clk_init()
23 clk_register_clkdev(clk, NULL, "fsmc-nand"); in nomadik_clk_init()
30 clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT, in nomadik_clk_init()
[all …]
Dclk-ls1x.c51 static struct clk * __init clk_register_pll(struct device *dev, in clk_register_pll()
55 struct clk *clk; in clk_register_pll() local
73 clk = clk_register(dev, hw); in clk_register_pll()
75 if (IS_ERR(clk)) in clk_register_pll()
78 return clk; in clk_register_pll()
83 struct clk *clk; in ls1x_clk_init() local
85 clk = clk_register_pll(NULL, "pll_clk", NULL, CLK_IS_ROOT); in ls1x_clk_init()
86 clk_prepare_enable(clk); in ls1x_clk_init()
88 clk = clk_register_divider(NULL, "cpu_clk", "pll_clk", in ls1x_clk_init()
91 clk_prepare_enable(clk); in ls1x_clk_init()
[all …]
Dclk-composite.c30 mux_hw->clk = hw->clk; in clk_composite_get_parent()
41 mux_hw->clk = hw->clk; in clk_composite_set_parent()
53 rate_hw->clk = hw->clk; in clk_composite_recalc_rate()
65 rate_hw->clk = hw->clk; in clk_composite_round_rate()
77 rate_hw->clk = hw->clk; in clk_composite_set_rate()
88 gate_hw->clk = hw->clk; in clk_composite_is_enabled()
99 gate_hw->clk = hw->clk; in clk_composite_enable()
110 gate_hw->clk = hw->clk; in clk_composite_disable()
115 struct clk *clk_register_composite(struct device *dev, const char *name, in clk_register_composite()
122 struct clk *clk; in clk_register_composite() local
[all …]
DMakefile2 obj-$(CONFIG_HAVE_CLK) += clk-devres.o
4 obj-$(CONFIG_COMMON_CLK) += clk.o
5 obj-$(CONFIG_COMMON_CLK) += clk-divider.o
6 obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
7 obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
8 obj-$(CONFIG_COMMON_CLK) += clk-gate.o
9 obj-$(CONFIG_COMMON_CLK) += clk-mux.o
10 obj-$(CONFIG_COMMON_CLK) += clk-composite.o
13 obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
14 obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
[all …]
/drivers/sh/clk/
Dcpg.c19 static unsigned int sh_clk_read(struct clk *clk) in sh_clk_read() argument
21 if (clk->flags & CLK_ENABLE_REG_8BIT) in sh_clk_read()
22 return ioread8(clk->mapped_reg); in sh_clk_read()
23 else if (clk->flags & CLK_ENABLE_REG_16BIT) in sh_clk_read()
24 return ioread16(clk->mapped_reg); in sh_clk_read()
26 return ioread32(clk->mapped_reg); in sh_clk_read()
29 static void sh_clk_write(int value, struct clk *clk) in sh_clk_write() argument
31 if (clk->flags & CLK_ENABLE_REG_8BIT) in sh_clk_write()
32 iowrite8(value, clk->mapped_reg); in sh_clk_write()
33 else if (clk->flags & CLK_ENABLE_REG_16BIT) in sh_clk_write()
[all …]
Dcore.c39 void clk_rate_table_build(struct clk *clk, in clk_rate_table_build() argument
49 clk->nr_freqs = nr_freqs; in clk_rate_table_build()
64 freq = clk->parent->rate * mult / div; in clk_rate_table_build()
137 long clk_rate_table_round(struct clk *clk, in clk_rate_table_round() argument
143 .max = clk->nr_freqs - 1, in clk_rate_table_round()
149 if (clk->nr_freqs < 1) in clk_rate_table_round()
161 long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, in clk_rate_div_range_round() argument
168 .arg = clk_get_parent(clk), in clk_rate_div_range_round()
181 long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min, in clk_rate_mult_range_round() argument
188 .arg = clk_get_parent(clk), in clk_rate_mult_range_round()
[all …]
/drivers/clk/mmp/
Dclk-mmp2.c80 struct clk *clk; in mmp2_clk_init() local
81 struct clk *vctcxo; in mmp2_clk_init()
104 clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200); in mmp2_clk_init()
105 clk_register_clkdev(clk, "clk32", NULL); in mmp2_clk_init()
111 clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT, in mmp2_clk_init()
113 clk_register_clkdev(clk, "pll1", NULL); in mmp2_clk_init()
115 clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, CLK_IS_ROOT, in mmp2_clk_init()
117 clk_register_clkdev(clk, "usb_pll", NULL); in mmp2_clk_init()
119 clk = clk_register_fixed_rate(NULL, "pll2", NULL, CLK_IS_ROOT, in mmp2_clk_init()
121 clk_register_clkdev(clk, "pll2", NULL); in mmp2_clk_init()
[all …]
Dclk-pxa168.c71 struct clk *clk; in pxa168_clk_init() local
72 struct clk *uart_pll; in pxa168_clk_init()
95 clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200); in pxa168_clk_init()
96 clk_register_clkdev(clk, "clk32", NULL); in pxa168_clk_init()
98 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT, in pxa168_clk_init()
100 clk_register_clkdev(clk, "vctcxo", NULL); in pxa168_clk_init()
102 clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT, in pxa168_clk_init()
104 clk_register_clkdev(clk, "pll1", NULL); in pxa168_clk_init()
106 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1", in pxa168_clk_init()
108 clk_register_clkdev(clk, "pll1_2", NULL); in pxa168_clk_init()
[all …]
Dclk-pxa910.c69 struct clk *clk; in pxa910_clk_init() local
70 struct clk *uart_pll; in pxa910_clk_init()
100 clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200); in pxa910_clk_init()
101 clk_register_clkdev(clk, "clk32", NULL); in pxa910_clk_init()
103 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT, in pxa910_clk_init()
105 clk_register_clkdev(clk, "vctcxo", NULL); in pxa910_clk_init()
107 clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT, in pxa910_clk_init()
109 clk_register_clkdev(clk, "pll1", NULL); in pxa910_clk_init()
111 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1", in pxa910_clk_init()
113 clk_register_clkdev(clk, "pll1_2", NULL); in pxa910_clk_init()
[all …]
/drivers/clk/spear/
Dspear3xx_clock.c143 struct clk *clk; in spear300_clk_init() local
145 clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0, in spear300_clk_init()
147 clk_register_clkdev(clk, NULL, "60000000.clcd"); in spear300_clk_init()
149 clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1, in spear300_clk_init()
151 clk_register_clkdev(clk, NULL, "94000000.flash"); in spear300_clk_init()
153 clk = clk_register_fixed_factor(NULL, "sdhci_clk", "ras_ahb_clk", 0, 1, in spear300_clk_init()
155 clk_register_clkdev(clk, NULL, "70000000.sdhci"); in spear300_clk_init()
157 clk = clk_register_fixed_factor(NULL, "gpio1_clk", "ras_apb_clk", 0, 1, in spear300_clk_init()
159 clk_register_clkdev(clk, NULL, "a9000000.gpio"); in spear300_clk_init()
161 clk = clk_register_fixed_factor(NULL, "kbd_clk", "ras_apb_clk", 0, 1, in spear300_clk_init()
[all …]
Dspear1310_clock.c388 struct clk *clk, *clk1; in spear1310_clk_init() local
390 clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, in spear1310_clk_init()
392 clk_register_clkdev(clk, "osc_32k_clk", NULL); in spear1310_clk_init()
394 clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, in spear1310_clk_init()
396 clk_register_clkdev(clk, "osc_24m_clk", NULL); in spear1310_clk_init()
398 clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT, in spear1310_clk_init()
400 clk_register_clkdev(clk, "osc_25m_clk", NULL); in spear1310_clk_init()
402 clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT, in spear1310_clk_init()
404 clk_register_clkdev(clk, "gmii_pad_clk", NULL); in spear1310_clk_init()
406 clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, in spear1310_clk_init()
[all …]
Dspear1340_clock.c445 struct clk *clk, *clk1; in spear1340_clk_init() local
447 clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, in spear1340_clk_init()
449 clk_register_clkdev(clk, "osc_32k_clk", NULL); in spear1340_clk_init()
451 clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, in spear1340_clk_init()
453 clk_register_clkdev(clk, "osc_24m_clk", NULL); in spear1340_clk_init()
455 clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT, in spear1340_clk_init()
457 clk_register_clkdev(clk, "osc_25m_clk", NULL); in spear1340_clk_init()
459 clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT, in spear1340_clk_init()
461 clk_register_clkdev(clk, "gmii_pad_clk", NULL); in spear1340_clk_init()
463 clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, in spear1340_clk_init()
[all …]
Dspear6xx_clock.c119 struct clk *clk, *clk1; in spear6xx_clk_init() local
121 clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, in spear6xx_clk_init()
123 clk_register_clkdev(clk, "osc_32k_clk", NULL); in spear6xx_clk_init()
125 clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, CLK_IS_ROOT, in spear6xx_clk_init()
127 clk_register_clkdev(clk, "osc_30m_clk", NULL); in spear6xx_clk_init()
130 clk = clk_register_gate(NULL, "rtc_spear", "osc_32k_clk", 0, in spear6xx_clk_init()
132 clk_register_clkdev(clk, NULL, "rtc-spear"); in spear6xx_clk_init()
135 clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0, in spear6xx_clk_init()
137 clk_register_clkdev(clk, "pll3_clk", NULL); in spear6xx_clk_init()
139 clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk", in spear6xx_clk_init()
[all …]
/drivers/clk/tegra/
Dclk-tegra30.c347 static struct clk *clks[clk_max];
844 struct clk *clk; in tegra30_pll_init() local
847 clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
851 clk_register_clkdev(clk, "pll_c", NULL); in tegra30_pll_init()
852 clks[pll_c] = clk; in tegra30_pll_init()
855 clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c", in tegra30_pll_init()
858 clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div", in tegra30_pll_init()
861 clk_register_clkdev(clk, "pll_c_out1", NULL); in tegra30_pll_init()
862 clks[pll_c_out1] = clk; in tegra30_pll_init()
865 clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, pmc_base, 0, in tegra30_pll_init()
[all …]
Dclk-tegra114.c936 static struct clk *clks[clk_max];
944 struct clk *clk; in tegra114_osc_clk_init() local
956 clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT, in tegra114_osc_clk_init()
958 clk_register_clkdev(clk, "clk_m", NULL); in tegra114_osc_clk_init()
959 clks[clk_m] = clk; in tegra114_osc_clk_init()
964 clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m", in tegra114_osc_clk_init()
966 clk_register_clkdev(clk, "pll_ref", NULL); in tegra114_osc_clk_init()
967 clks[pll_ref] = clk; in tegra114_osc_clk_init()
976 struct clk *clk; in tegra114_fixed_clk_init() local
979 clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT, in tegra114_fixed_clk_init()
[all …]
Dclk-tegra20.c247 static struct clk *clks[clk_max];
576 struct clk *clk; in tegra20_pll_init() local
579 clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0, in tegra20_pll_init()
582 clk_register_clkdev(clk, "pll_c", NULL); in tegra20_pll_init()
583 clks[pll_c] = clk; in tegra20_pll_init()
586 clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c", in tegra20_pll_init()
589 clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div", in tegra20_pll_init()
592 clk_register_clkdev(clk, "pll_c_out1", NULL); in tegra20_pll_init()
593 clks[pll_c_out1] = clk; in tegra20_pll_init()
596 clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, NULL, 0, in tegra20_pll_init()
[all …]
/drivers/clk/samsung/
Dclk.c18 static struct clk **clk_table;
82 clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL); in samsung_clk_init()
97 void samsung_clk_add_lookup(struct clk *clk, unsigned int id) in samsung_clk_add_lookup() argument
100 clk_table[id] = clk; in samsung_clk_add_lookup()
107 struct clk *clk; in samsung_clk_register_alias() local
122 clk = clk_table[list->id]; in samsung_clk_register_alias()
123 if (!clk) { in samsung_clk_register_alias()
129 ret = clk_register_clkdev(clk, list->alias, list->dev_name); in samsung_clk_register_alias()
140 struct clk *clk; in samsung_clk_register_fixed_rate() local
144 clk = clk_register_fixed_rate(NULL, list->name, in samsung_clk_register_fixed_rate()
[all …]
/drivers/clk/versatile/
Dclk-realview.c53 struct clk *clk; in realview_clk_init() local
56 clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); in realview_clk_init()
57 clk_register_clkdev(clk, "apb_pclk", NULL); in realview_clk_init()
60 clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT, in realview_clk_init()
62 clk_register_clkdev(clk, NULL, "dev:uart0"); in realview_clk_init()
63 clk_register_clkdev(clk, NULL, "dev:uart1"); in realview_clk_init()
64 clk_register_clkdev(clk, NULL, "dev:uart2"); in realview_clk_init()
65 clk_register_clkdev(clk, NULL, "fpga:kmi0"); in realview_clk_init()
66 clk_register_clkdev(clk, NULL, "fpga:kmi1"); in realview_clk_init()
67 clk_register_clkdev(clk, NULL, "fpga:mmc0"); in realview_clk_init()
[all …]

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