| /drivers/infiniband/hw/ipath/ |
| D | ipath_init_chip.c | 87 static int create_port0_egr(struct ipath_devdata *dd) in create_port0_egr() argument
93 egrcnt = dd->ipath_p0_rcvegrcnt; in create_port0_egr()
95 skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt); in create_port0_egr()
97 ipath_dev_err(dd, "allocation error for eager TID " in create_port0_egr()
111 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL); in create_port0_egr()
113 ipath_dev_err(dd, "SKB allocation error for " in create_port0_egr()
126 dd->ipath_port0_skbinfo = skbinfo; in create_port0_egr()
129 dd->ipath_port0_skbinfo[e].phys = in create_port0_egr()
130 ipath_map_single(dd->pcidev, in create_port0_egr()
131 dd->ipath_port0_skbinfo[e].skb->data, in create_port0_egr()
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| D | ipath_sdma.c | 42 static void vl15_watchdog_enq(struct ipath_devdata *dd) in vl15_watchdog_enq() argument
45 if (atomic_inc_return(&dd->ipath_sdma_vl15_count) == 1) { in vl15_watchdog_enq()
47 dd->ipath_sdma_vl15_timer.expires = jiffies + interval; in vl15_watchdog_enq()
48 add_timer(&dd->ipath_sdma_vl15_timer); in vl15_watchdog_enq()
52 static void vl15_watchdog_deq(struct ipath_devdata *dd) in vl15_watchdog_deq() argument
55 if (atomic_dec_return(&dd->ipath_sdma_vl15_count) != 0) { in vl15_watchdog_deq()
57 mod_timer(&dd->ipath_sdma_vl15_timer, jiffies + interval); in vl15_watchdog_deq()
59 del_timer(&dd->ipath_sdma_vl15_timer); in vl15_watchdog_deq()
65 struct ipath_devdata *dd = (struct ipath_devdata *)opaque; in vl15_watchdog_timeout() local
67 if (atomic_read(&dd->ipath_sdma_vl15_count) != 0) { in vl15_watchdog_timeout()
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| D | ipath_intr.c | 47 void ipath_disarm_senderrbufs(struct ipath_devdata *dd) in ipath_disarm_senderrbufs() argument
55 piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k; in ipath_disarm_senderrbufs()
58 dd, dd->ipath_kregs->kr_sendbuffererror); in ipath_disarm_senderrbufs()
60 dd, dd->ipath_kregs->kr_sendbuffererror + 1); in ipath_disarm_senderrbufs()
63 dd, dd->ipath_kregs->kr_sendbuffererror + 2); in ipath_disarm_senderrbufs()
66 dd, dd->ipath_kregs->kr_sendbuffererror + 3); in ipath_disarm_senderrbufs()
73 dd->ipath_lastcancel > jiffies) { in ipath_disarm_senderrbufs()
84 ipath_disarm_piobufs(dd, i, 1); in ipath_disarm_senderrbufs()
86 dd->ipath_lastcancel = jiffies+3; in ipath_disarm_senderrbufs()
131 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs) in handle_e_sum_errs() argument
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| D | ipath_driver.c | 157 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev, in read_bars() argument
164 ipath_dev_err(dd, "failed to read bar0 before enable: " in read_bars()
169 ipath_dev_err(dd, "failed to read bar1 before enable: " in read_bars()
176 struct ipath_devdata *dd) in ipath_free_devdata() argument
182 if (dd->ipath_unit != -1) { in ipath_free_devdata()
184 idr_remove(&unit_table, dd->ipath_unit); in ipath_free_devdata()
185 list_del(&dd->ipath_list); in ipath_free_devdata()
188 vfree(dd); in ipath_free_devdata()
194 struct ipath_devdata *dd; in ipath_alloc_devdata() local
197 dd = vzalloc(sizeof(*dd)); in ipath_alloc_devdata()
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| D | ipath_iba6110.c | 394 static void hwerr_crcbits(struct ipath_devdata *dd, ipath_err_t hwerrs, in hwerr_crcbits() argument
401 if (dd->ipath_flags & IPATH_8BIT_IN_HT0) in hwerr_crcbits()
404 if (dd->ipath_flags & IPATH_8BIT_IN_HT1) in hwerr_crcbits()
427 if (pci_read_config_word(dd->pcidev, in hwerr_crcbits()
428 dd->ipath_ht_slave_off + 0x4, in hwerr_crcbits()
430 dev_info(&dd->pcidev->dev, "Couldn't read " in hwerr_crcbits()
439 if (pci_read_config_word(dd->pcidev, in hwerr_crcbits()
440 dd->ipath_ht_slave_off + 0x8, in hwerr_crcbits()
442 dev_info(&dd->pcidev->dev, "Couldn't read " in hwerr_crcbits()
453 dd->ipath_hwerrmask &= ~crcbits; in hwerr_crcbits()
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| D | ipath_stats.c | 52 u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg) in ipath_snap_cntr() argument
62 if (!(dd->ipath_flags & IPATH_32BITCOUNTERS) && in ipath_snap_cntr()
63 (creg == dd->ipath_cregs->cr_wordsendcnt || in ipath_snap_cntr()
64 creg == dd->ipath_cregs->cr_wordrcvcnt || in ipath_snap_cntr()
65 creg == dd->ipath_cregs->cr_pktsendcnt || in ipath_snap_cntr()
66 creg == dd->ipath_cregs->cr_pktrcvcnt)) { in ipath_snap_cntr()
67 val64 = ipath_read_creg(dd, creg); in ipath_snap_cntr()
71 val64 = val = ipath_read_creg32(dd, creg); in ipath_snap_cntr()
81 ipath_dev_err(dd, "Error! Read counter 0x%x timed out\n", in ipath_snap_cntr()
91 if (creg == dd->ipath_cregs->cr_wordsendcnt) { in ipath_snap_cntr()
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| D | ipath_eeprom.c | 114 static int i2c_gpio_set(struct ipath_devdata *dd, in i2c_gpio_set() argument
121 gpioval = &dd->ipath_gpio_out; in i2c_gpio_set()
124 dir_mask = dd->ipath_gpio_scl; in i2c_gpio_set()
125 out_mask = (1UL << dd->ipath_gpio_scl_num); in i2c_gpio_set()
127 dir_mask = dd->ipath_gpio_sda; in i2c_gpio_set()
128 out_mask = (1UL << dd->ipath_gpio_sda_num); in i2c_gpio_set()
131 spin_lock_irqsave(&dd->ipath_gpio_lock, flags); in i2c_gpio_set()
134 dd->ipath_extctrl &= ~dir_mask; in i2c_gpio_set()
137 dd->ipath_extctrl |= dir_mask; in i2c_gpio_set()
139 ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, dd->ipath_extctrl); in i2c_gpio_set()
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| /drivers/infiniband/hw/qib/ |
| D | qib_iba6120.c | 306 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
309 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
312 if (dd->userbase) in qib_read_ureg32()
314 ((char __iomem *)dd->userbase + in qib_read_ureg32()
315 dd->ureg_align * ctxt)); in qib_read_ureg32()
318 (dd->uregbase + in qib_read_ureg32()
319 (char __iomem *)dd->kregbase + in qib_read_ureg32()
320 dd->ureg_align * ctxt)); in qib_read_ureg32()
332 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
336 if (dd->userbase) in qib_write_ureg()
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| D | qib_init.c | 101 void qib_set_ctxtcnt(struct qib_devdata *dd) in qib_set_ctxtcnt() argument
104 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus(); in qib_set_ctxtcnt()
105 if (dd->cfgctxts > dd->ctxtcnt) in qib_set_ctxtcnt()
106 dd->cfgctxts = dd->ctxtcnt; in qib_set_ctxtcnt()
107 } else if (qib_cfgctxts < dd->num_pports) in qib_set_ctxtcnt()
108 dd->cfgctxts = dd->ctxtcnt; in qib_set_ctxtcnt()
109 else if (qib_cfgctxts <= dd->ctxtcnt) in qib_set_ctxtcnt()
110 dd->cfgctxts = qib_cfgctxts; in qib_set_ctxtcnt()
112 dd->cfgctxts = dd->ctxtcnt; in qib_set_ctxtcnt()
113 dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 : in qib_set_ctxtcnt()
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| D | qib_twsi.c | 67 static void i2c_wait_for_writes(struct qib_devdata *dd) in i2c_wait_for_writes() argument
74 dd->f_gpio_mod(dd, 0, 0, 0); in i2c_wait_for_writes()
89 static void scl_out(struct qib_devdata *dd, u8 bit) in scl_out() argument
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
98 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in scl_out()
109 if (mask & dd->f_gpio_mod(dd, 0, 0, 0)) in scl_out()
114 qib_dev_err(dd, "SCL interface stuck low > %d uSec\n", in scl_out()
117 i2c_wait_for_writes(dd); in scl_out()
120 static void sda_out(struct qib_devdata *dd, u8 bit) in sda_out() argument
124 mask = 1UL << dd->gpio_sda_num; in sda_out()
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| D | qib_tx.c | 61 void qib_disarm_piobufs(struct qib_devdata *dd, unsigned first, unsigned cnt) in qib_disarm_piobufs() argument
68 spin_lock_irqsave(&dd->pioavail_lock, flags); in qib_disarm_piobufs()
70 __clear_bit(i, dd->pio_need_disarm); in qib_disarm_piobufs()
71 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(i)); in qib_disarm_piobufs()
73 spin_unlock_irqrestore(&dd->pioavail_lock, flags); in qib_disarm_piobufs()
82 struct qib_devdata *dd = rcd->dd; in qib_disarm_piobufs_ifneeded() local
103 spin_lock_irq(&dd->pioavail_lock); in qib_disarm_piobufs_ifneeded()
105 if (__test_and_clear_bit(i, dd->pio_need_disarm)) { in qib_disarm_piobufs_ifneeded()
107 dd->f_sendctrl(rcd->ppd, QIB_SENDCTRL_DISARM_BUF(i)); in qib_disarm_piobufs_ifneeded()
110 spin_unlock_irq(&dd->pioavail_lock); in qib_disarm_piobufs_ifneeded()
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| D | qib_iba7220.c | 229 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
232 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
235 if (dd->userbase) in qib_read_ureg32()
237 ((char __iomem *)dd->userbase + in qib_read_ureg32()
238 dd->ureg_align * ctxt)); in qib_read_ureg32()
241 (dd->uregbase + in qib_read_ureg32()
242 (char __iomem *)dd->kregbase + in qib_read_ureg32()
243 dd->ureg_align * ctxt)); in qib_read_ureg32()
255 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
260 if (dd->userbase) in qib_write_ureg()
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| D | qib_sd7220.c | 98 static int qib_sd7220_reg_mod(struct qib_devdata *dd, int sdnum, u32 loc,
100 static int ibsd_mod_allchnls(struct qib_devdata *dd, int loc, int val,
102 static int qib_sd_trimdone_poll(struct qib_devdata *dd);
103 static void qib_sd_trimdone_monitor(struct qib_devdata *dd, const char *where);
104 static int qib_sd_setvals(struct qib_devdata *dd);
105 static int qib_sd_early(struct qib_devdata *dd);
106 static int qib_sd_dactrim(struct qib_devdata *dd);
107 static int qib_internal_presets(struct qib_devdata *dd);
109 static int qib_sd_trimself(struct qib_devdata *dd, int val);
110 static int epb_access(struct qib_devdata *dd, int sdnum, int claim);
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| D | qib_iba7322.c | 157 #define IS_QMH(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ argument
159 #define IS_QME(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ argument
681 static inline void qib_write_kreg(const struct qib_devdata *dd,
700 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
703 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
706 (dd->ureg_align * ctxt) + (dd->userbase ? in qib_read_ureg32()
707 (char __iomem *)dd->userbase : in qib_read_ureg32()
708 (char __iomem *)dd->kregbase + dd->uregbase))); in qib_read_ureg32()
721 static inline u64 qib_read_ureg(const struct qib_devdata *dd, in qib_read_ureg() argument
725 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg()
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| D | qib_pcie.c | 135 int qib_pcie_ddinit(struct qib_devdata *dd, struct pci_dev *pdev, in qib_pcie_ddinit() argument
141 dd->pcidev = pdev; in qib_pcie_ddinit()
142 pci_set_drvdata(pdev, dd); in qib_pcie_ddinit()
149 dd->kregbase = __ioremap(addr, len, _PAGE_NO_CACHE | _PAGE_WRITETHRU); in qib_pcie_ddinit()
151 dd->kregbase = ioremap_nocache(addr, len); in qib_pcie_ddinit()
154 if (!dd->kregbase) in qib_pcie_ddinit()
157 dd->kregend = (u64 __iomem *)((void __iomem *) dd->kregbase + len); in qib_pcie_ddinit()
158 dd->physaddr = addr; /* used for io_remap, etc. */ in qib_pcie_ddinit()
164 dd->pcibar0 = addr; in qib_pcie_ddinit()
165 dd->pcibar1 = addr >> 32; in qib_pcie_ddinit()
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| D | qib_eeprom.c | 53 int qib_eeprom_read(struct qib_devdata *dd, u8 eeprom_offset, in qib_eeprom_read() argument
58 ret = mutex_lock_interruptible(&dd->eep_lock); in qib_eeprom_read()
60 ret = qib_twsi_reset(dd); in qib_eeprom_read()
62 qib_dev_err(dd, "EEPROM Reset for read failed\n"); in qib_eeprom_read()
64 ret = qib_twsi_blk_rd(dd, dd->twsi_eeprom_dev, in qib_eeprom_read()
66 mutex_unlock(&dd->eep_lock); in qib_eeprom_read()
77 static int eeprom_write_with_enable(struct qib_devdata *dd, u8 offset, in eeprom_write_with_enable() argument
82 pwen = dd->f_eeprom_wen(dd, 1); in eeprom_write_with_enable()
83 ret = qib_twsi_reset(dd); in eeprom_write_with_enable()
85 qib_dev_err(dd, "EEPROM Reset for write failed\n"); in eeprom_write_with_enable()
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| D | qib_diag.c | 69 struct qib_devdata *dd; member
78 static struct qib_diag_client *get_client(struct qib_devdata *dd) in get_client() argument
92 dc->dd = dd; in get_client()
104 struct qib_devdata *dd = dc->dd; in return_client() local
108 if (dc == dd->diag_client) { in return_client()
109 dd->diag_client = dc->next; in return_client()
112 tdc = dc->dd->diag_client; in return_client()
124 rdc->dd = NULL; in return_client()
160 int qib_diag_add(struct qib_devdata *dd) in qib_diag_add() argument
173 snprintf(name, sizeof(name), "ipath_diag%d", dd->unit); in qib_diag_add()
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| /drivers/crypto/ |
| D | omap-aes.c | 46 #define AES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \ argument
48 #define AES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04)) argument
50 #define AES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs) argument
63 #define AES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04)) argument
65 #define AES_REG_REV(dd) ((dd)->pdata->rev_ofs) argument
67 #define AES_REG_MASK(dd) ((dd)->pdata->mask_ofs) argument
90 struct omap_aes_dev *dd; member
114 void (*trigger)(struct omap_aes_dev *dd, int length);
175 static inline u32 omap_aes_read(struct omap_aes_dev *dd, u32 offset) in omap_aes_read() argument
177 return __raw_readl(dd->io_base + offset); in omap_aes_read()
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| D | atmel-aes.c | 81 struct atmel_aes_dev *dd; member
213 static inline u32 atmel_aes_read(struct atmel_aes_dev *dd, u32 offset) in atmel_aes_read() argument
215 return readl_relaxed(dd->io_base + offset); in atmel_aes_read()
218 static inline void atmel_aes_write(struct atmel_aes_dev *dd, in atmel_aes_write() argument
221 writel_relaxed(value, dd->io_base + offset); in atmel_aes_write()
224 static void atmel_aes_read_n(struct atmel_aes_dev *dd, u32 offset, in atmel_aes_read_n() argument
228 *value = atmel_aes_read(dd, offset); in atmel_aes_read_n()
231 static void atmel_aes_write_n(struct atmel_aes_dev *dd, u32 offset, in atmel_aes_write_n() argument
235 atmel_aes_write(dd, offset, *value); in atmel_aes_write_n()
244 if (!ctx->dd) { in atmel_aes_find_dev()
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| D | atmel-tdes.c | 74 struct atmel_tdes_dev *dd; member
180 static inline u32 atmel_tdes_read(struct atmel_tdes_dev *dd, u32 offset) in atmel_tdes_read() argument
182 return readl_relaxed(dd->io_base + offset); in atmel_tdes_read()
185 static inline void atmel_tdes_write(struct atmel_tdes_dev *dd, in atmel_tdes_write() argument
188 writel_relaxed(value, dd->io_base + offset); in atmel_tdes_write()
191 static void atmel_tdes_write_n(struct atmel_tdes_dev *dd, u32 offset, in atmel_tdes_write_n() argument
195 atmel_tdes_write(dd, offset, *value); in atmel_tdes_write_n()
204 if (!ctx->dd) { in atmel_tdes_find_dev()
209 ctx->dd = tdes_dd; in atmel_tdes_find_dev()
211 tdes_dd = ctx->dd; in atmel_tdes_find_dev()
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| D | tegra-aes.c | 181 struct tegra_aes_dev *dd; member
204 static inline u32 aes_readl(struct tegra_aes_dev *dd, u32 offset) in aes_readl() argument
206 return readl(dd->io_base + offset); in aes_readl()
209 static inline void aes_writel(struct tegra_aes_dev *dd, u32 val, u32 offset) in aes_writel() argument
211 writel(val, dd->io_base + offset); in aes_writel()
214 static int aes_start_crypt(struct tegra_aes_dev *dd, u32 in_addr, u32 out_addr, in aes_start_crypt() argument
222 aes_writel(dd, 0xFFFFFFFF, TEGRA_AES_INTR_STATUS); in aes_start_crypt()
225 aes_writel(dd, 0x33, TEGRA_AES_INT_ENB); in aes_start_crypt()
232 value = aes_readl(dd, TEGRA_AES_CMDQUE_CONTROL); in aes_start_crypt()
239 aes_writel(dd, value, TEGRA_AES_CMDQUE_CONTROL); in aes_start_crypt()
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| D | omap-sham.c | 53 #define SHA_REG_IDIGEST(dd, x) ((dd)->pdata->idigest_ofs + ((x)*0x04)) argument
54 #define SHA_REG_DIN(dd, x) ((dd)->pdata->din_ofs + ((x) * 0x04)) argument
55 #define SHA_REG_DIGCNT(dd) ((dd)->pdata->digcnt_ofs) argument
67 #define SHA_REG_REV(dd) ((dd)->pdata->rev_ofs) argument
69 #define SHA_REG_MASK(dd) ((dd)->pdata->mask_ofs) argument
75 #define SHA_REG_SYSSTATUS(dd) ((dd)->pdata->sysstatus_ofs) argument
144 struct omap_sham_dev *dd; member
170 struct omap_sham_dev *dd; member
195 void (*write_ctrl)(struct omap_sham_dev *dd, size_t length,
197 void (*trigger)(struct omap_sham_dev *dd, size_t length);
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| D | atmel-sha.c | 80 struct atmel_sha_dev *dd; member
101 struct atmel_sha_dev *dd; member
150 static inline u32 atmel_sha_read(struct atmel_sha_dev *dd, u32 offset) in atmel_sha_read() argument
152 return readl_relaxed(dd->io_base + offset); in atmel_sha_read()
155 static inline void atmel_sha_write(struct atmel_sha_dev *dd, in atmel_sha_write() argument
158 writel_relaxed(value, dd->io_base + offset); in atmel_sha_write()
251 struct atmel_sha_dev *dd = NULL; in atmel_sha_init() local
255 if (!tctx->dd) { in atmel_sha_init()
257 dd = tmp; in atmel_sha_init()
260 tctx->dd = dd; in atmel_sha_init()
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| /drivers/block/mtip32xx/ |
| D | mtip32xx.c | 101 static int mtip_block_initialize(struct driver_data *dd);
148 static void mtip_command_cleanup(struct driver_data *dd) in mtip_command_cleanup() argument
152 struct mtip_port *port = dd->port; in mtip_command_cleanup()
176 dma_unmap_sg(&port->dd->pdev->dev, in mtip_command_cleanup()
185 set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag); in mtip_command_cleanup()
205 unsigned int num_command_slots = port->dd->slot_groups * 32; in get_slot()
223 dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n"); in get_slot()
225 if (mtip_check_surprise_removal(port->dd->pdev)) { in get_slot()
227 mtip_command_cleanup(port->dd); in get_slot()
257 static int mtip_hba_reset(struct driver_data *dd) in mtip_hba_reset() argument
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| /drivers/parport/ |
| D | parport_ax88796.c | 58 struct ax_drvdata *dd = pp_to_drv(p); in parport_ax88796_read_data() local
60 return readb(dd->spp_data); in parport_ax88796_read_data()
66 struct ax_drvdata *dd = pp_to_drv(p); in parport_ax88796_write_data() local
68 writeb(data, dd->spp_data); in parport_ax88796_write_data()
74 struct ax_drvdata *dd = pp_to_drv(p); in parport_ax88796_read_control() local
75 unsigned int cpr = readb(dd->spp_cpr); in parport_ax88796_read_control()
96 struct ax_drvdata *dd = pp_to_drv(p); in parport_ax88796_write_control() local
97 unsigned int cpr = readb(dd->spp_cpr); in parport_ax88796_write_control()
113 dev_dbg(dd->dev, "write_control: ctrl=%02x, cpr=%02x\n", control, cpr); in parport_ax88796_write_control()
114 writeb(cpr, dd->spp_cpr); in parport_ax88796_write_control()
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