| /arch/blackfin/mach-bf537/ |
| D | Kconfig | 25 config IRQ_SPORT0_RX config
26 int "IRQ_SPORT0_RX"
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| D | dma.c | 60 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| /arch/blackfin/mach-bf533/ |
| D | dma.c | 40 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| /arch/blackfin/mach-bf518/ |
| D | dma.c | 60 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| D | Kconfig | 194 config IRQ_SPORT0_RX config
195 int "IRQ_SPORT0_RX"
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| /arch/blackfin/mach-bf527/ |
| D | dma.c | 60 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| D | Kconfig | 193 config IRQ_SPORT0_RX config
194 int "IRQ_SPORT0_RX"
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| /arch/blackfin/mach-bf538/ |
| D | Kconfig | 37 config IRQ_SPORT0_RX config
38 int "IRQ_SPORT0_RX"
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| D | dma.c | 80 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| /arch/blackfin/mach-bf533/include/mach/ |
| D | irq.h | 23 #define IRQ_SPORT0_RX BFIN_IRQ(9) /* DMA1 Interrupt (SPORT0 RX) */ macro
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| /arch/blackfin/mach-bf561/ |
| D | dma.c | 66 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| /arch/blackfin/mach-bf533/boards/ |
| D | stamp.c | 382 .start = IRQ_SPORT0_RX,
383 .end = IRQ_SPORT0_RX+1,
457 .start = IRQ_SPORT0_RX,
458 .end = IRQ_SPORT0_RX+1,
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| D | blackstamp.c | 277 .start = IRQ_SPORT0_RX,
278 .end = IRQ_SPORT0_RX+1,
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| D | cm_bf533.c | 304 .start = IRQ_SPORT0_RX,
305 .end = IRQ_SPORT0_RX+1,
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| /arch/blackfin/mach-bf537/boards/ |
| D | cm_bf537e.c | 598 .start = IRQ_SPORT0_RX,
599 .end = IRQ_SPORT0_RX+1,
662 .start = IRQ_SPORT0_RX,
663 .end = IRQ_SPORT0_RX+1,
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| D | minotaur.c | 422 .start = IRQ_SPORT0_RX,
423 .end = IRQ_SPORT0_RX+1,
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| D | tcm_bf537.c | 492 .start = IRQ_SPORT0_RX,
493 .end = IRQ_SPORT0_RX+1,
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| /arch/blackfin/mach-bf548/ |
| D | dma.c | 56 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| /arch/blackfin/mach-bf537/include/mach/ |
| D | irq.h | 19 #define IRQ_SPORT0_RX BFIN_IRQ(5) /* DMA3 Interrupt (SPORT0 RX) */ macro
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| /arch/blackfin/mach-bf538/include/mach/ |
| D | irq.h | 23 #define IRQ_SPORT0_RX BFIN_IRQ(9) /* DMA 1 Channel (SPORT0 RX) */ macro
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| /arch/blackfin/mach-bf527/include/mach/ |
| D | irq.h | 28 #define IRQ_SPORT0_RX BFIN_IRQ(16) /* DMA 3 Channel (SPORT0 RX) */ macro
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| /arch/blackfin/mach-bf518/include/mach/ |
| D | irq.h | 29 #define IRQ_SPORT0_RX BFIN_IRQ(16) /* DMA 3 Channel (SPORT0 RX) */ macro
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| /arch/blackfin/mach-bf609/ |
| D | dma.c | 71 ret_irq = IRQ_SPORT0_RX; in channel2irq()
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| /arch/blackfin/mach-bf518/boards/ |
| D | tcm-bf518.c | 505 .start = IRQ_SPORT0_RX,
506 .end = IRQ_SPORT0_RX+1,
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| /arch/blackfin/mach-bf561/include/mach/ |
| D | irq.h | 43 #define IRQ_SPORT0_RX IRQ_DMA2_0 /* DMA2 0 (SPORT0 RX) */ macro
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