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Searched refs:cci (Results 1 – 14 of 14) sorted by relevance

/arch/arm/boot/dts/
Dexynos5420-cpus.dtsi34 cci-control-port = <&cci_control1>;
44 cci-control-port = <&cci_control1>;
54 cci-control-port = <&cci_control1>;
64 cci-control-port = <&cci_control1>;
75 cci-control-port = <&cci_control0>;
85 cci-control-port = <&cci_control0>;
95 cci-control-port = <&cci_control0>;
105 cci-control-port = <&cci_control0>;
Dexynos5422-cpus.dtsi33 cci-control-port = <&cci_control0>;
43 cci-control-port = <&cci_control0>;
53 cci-control-port = <&cci_control0>;
63 cci-control-port = <&cci_control0>;
74 cci-control-port = <&cci_control1>;
84 cci-control-port = <&cci_control1>;
94 cci-control-port = <&cci_control1>;
104 cci-control-port = <&cci_control1>;
Dexynos5260.dtsi40 cci-control-port = <&cci_control1>;
47 cci-control-port = <&cci_control1>;
54 cci-control-port = <&cci_control0>;
61 cci-control-port = <&cci_control0>;
68 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
201 cci: cci@10F00000 { label
202 compatible = "arm,cci-400";
209 compatible = "arm,cci-400-ctrl-if";
215 compatible = "arm,cci-400-ctrl-if";
Dvexpress-v2p-ca15_a7.dts41 cci-control-port = <&cci_control1>;
51 cci-control-port = <&cci_control1>;
61 cci-control-port = <&cci_control2>;
71 cci-control-port = <&cci_control2>;
81 cci-control-port = <&cci_control2>;
217 cci@2c090000 {
218 compatible = "arm,cci-400";
225 compatible = "arm,cci-400-ctrl-if";
231 compatible = "arm,cci-400-ctrl-if";
237 compatible = "arm,cci-400-pmu,r0";
Dexynos5420.dtsi159 cci: cci@10d20000 { label
160 compatible = "arm,cci-400";
167 compatible = "arm,cci-400-ctrl-if";
172 compatible = "arm,cci-400-ctrl-if";
Dexynos5420-arndale-octa.dts69 &cci {
/arch/ia64/kernel/
Dtopology.c125 pal_cache_config_info_t cci; member
188 return sprintf(buf, "%u\n", 1 << this_leaf->cci.pcci_line_size); in show_coherency_line_size()
194 return sprintf(buf, "%u\n", this_leaf->cci.pcci_assoc); in show_ways_of_associativity()
201 cache_mattrib[this_leaf->cci.pcci_cache_attr]); in show_attributes()
206 return sprintf(buf, "%uK\n", this_leaf->cci.pcci_cache_size / 1024); in show_size()
211 unsigned number_of_sets = this_leaf->cci.pcci_cache_size; in show_number_of_sets()
212 number_of_sets /= this_leaf->cci.pcci_assoc; in show_number_of_sets()
213 number_of_sets /= 1 << this_leaf->cci.pcci_line_size; in show_number_of_sets()
230 int type = this_leaf->type + this_leaf->cci.pcci_unified; in show_type()
311 pal_cache_config_info_t cci; in cpu_cache_sysfs_init() local
[all …]
Dpalinfo.c214 pal_cache_config_info_t cci; in cache_info() local
229 if ((status=ia64_pal_cache_config_info(i,j, &cci)) != 0) in cache_info()
236 cache_types[j+cci.pcci_unified], i+1, in cache_info()
237 cci.pcci_cache_size); in cache_info()
239 if (cci.pcci_unified) in cache_info()
242 seq_printf(m, "%s\n", cache_mattrib[cci.pcci_cache_attr]); in cache_info()
248 cci.pcci_assoc, in cache_info()
249 1<<cci.pcci_line_size, in cache_info()
250 1<<cci.pcci_stride); in cache_info()
255 cci.pcci_st_latency); in cache_info()
[all …]
Dsetup.c858 pal_cache_config_info_t cci; in get_cache_info() local
875 status = ia64_pal_cache_config_info(l, 2, &cci); in get_cache_info()
882 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
885 cci.pcci_unified = 1; in get_cache_info()
887 if (cci.pcci_stride < ia64_cache_stride_shift) in get_cache_info()
888 ia64_cache_stride_shift = cci.pcci_stride; in get_cache_info()
890 line_size = 1 << cci.pcci_line_size; in get_cache_info()
895 if (!cci.pcci_unified) { in get_cache_info()
897 status = ia64_pal_cache_config_info(l, 1, &cci); in get_cache_info()
903 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
[all …]
/arch/ia64/pci/
Dpci.c552 pal_cache_config_info_t cci; in set_pci_dfl_cacheline_size() local
562 /* cache_type (data_or_unified)= */ 2, &cci); in set_pci_dfl_cacheline_size()
568 pci_dfl_cache_line_size = (1 << cci.pcci_line_size) / 4; in set_pci_dfl_cacheline_size()
/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi173 cci: cci@fd6e0000 { label
174 compatible = "arm,cci-400";
181 compatible = "arm,cci-400-pmu,r1";
/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi443 cci@65590000 {
444 compatible = "arm,cci-400";
451 compatible = "arm,cci-400-pmu,r1",
452 "arm,cci-400-pmu";
/arch/arm64/boot/dts/hisilicon/
Dhi3660.dtsi449 dma-no-cci;
Dhi6220.dtsi408 dma-no-cci;