| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.h | 136 amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
139 struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev,
141 void amdgpu_atombios_i2c_init(struct amdgpu_device *adev);
143 bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev);
145 bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev);
147 int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev);
149 int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev);
151 int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev);
153 bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev,
157 int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev,
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| D | nbio_v6_1.h | 31 int nbio_v6_1_init(struct amdgpu_device *adev);
32 u32 nbio_v6_1_get_atombios_scratch_regs(struct amdgpu_device *adev,
34 void nbio_v6_1_set_atombios_scratch_regs(struct amdgpu_device *adev,
36 void nbio_v6_1_mc_access_enable(struct amdgpu_device *adev, bool enable);
37 void nbio_v6_1_hdp_flush(struct amdgpu_device *adev);
38 u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev);
39 void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
41 void nbio_v6_1_enable_doorbell_aperture(struct amdgpu_device *adev,
43 void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *adev,
45 void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev,
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| D | si_ih.c | 29 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
31 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
43 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
58 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
97 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
103 static u32 si_ih_get_wptr(struct amdgpu_device *adev) in si_ih_get_wptr()
121 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
141 static void si_ih_set_rptr(struct amdgpu_device *adev) in si_ih_set_rptr()
148 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_early_init()
158 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_sw_init()
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| D | cik_ih.c | 49 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
58 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
77 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
104 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
168 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
186 static u32 cik_ih_get_wptr(struct amdgpu_device *adev) in cik_ih_get_wptr()
239 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
269 static void cik_ih_set_rptr(struct amdgpu_device *adev) in cik_ih_set_rptr()
276 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_early_init()
291 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_sw_init()
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| D | amdgpu_powerplay.c | 37 static int amdgpu_create_pp_handle(struct amdgpu_device *adev) in amdgpu_create_pp_handle()
57 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_early_init()
123 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_late_init()
140 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_sw_init()
152 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_sw_fini()
166 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_hw_init()
189 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_hw_fini()
206 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_late_fini()
220 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_suspend()
231 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in amdgpu_pp_resume()
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| D | vce_v2_0.c | 45 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
46 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
57 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_wptr()
91 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_set_wptr()
99 static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) in vce_v2_0_lmi_clean()
116 static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) in vce_v2_0_firmware_loaded()
142 static void vce_v2_0_disable_cg(struct amdgpu_device *adev) in vce_v2_0_disable_cg()
147 static void vce_v2_0_init_cg(struct amdgpu_device *adev) in vce_v2_0_init_cg()
168 static void vce_v2_0_mc_resume(struct amdgpu_device *adev) in vce_v2_0_mc_resume()
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| D | amdgpu_irq.h | 33 struct amdgpu_device;
54 int (*set)(struct amdgpu_device *adev, struct amdgpu_irq_src *source,
57 int (*process)(struct amdgpu_device *adev,
86 int amdgpu_irq_init(struct amdgpu_device *adev);
87 void amdgpu_irq_fini(struct amdgpu_device *adev);
88 int amdgpu_irq_add_id(struct amdgpu_device *adev,
91 void amdgpu_irq_dispatch(struct amdgpu_device *adev,
93 int amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
95 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
97 int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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| D | tonga_ih.c | 49 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev);
58 static void tonga_ih_enable_interrupts(struct amdgpu_device *adev) in tonga_ih_enable_interrupts()
75 static void tonga_ih_disable_interrupts(struct amdgpu_device *adev) in tonga_ih_disable_interrupts()
100 static int tonga_ih_irq_init(struct amdgpu_device *adev) in tonga_ih_irq_init()
177 static void tonga_ih_irq_disable(struct amdgpu_device *adev) in tonga_ih_irq_disable()
196 static u32 tonga_ih_get_wptr(struct amdgpu_device *adev) in tonga_ih_get_wptr()
229 static void tonga_ih_decode_iv(struct amdgpu_device *adev, in tonga_ih_decode_iv()
259 static void tonga_ih_set_rptr(struct amdgpu_device *adev) in tonga_ih_set_rptr()
275 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_early_init()
290 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_sw_init()
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| D | iceland_ih.c | 49 static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev);
58 static void iceland_ih_enable_interrupts(struct amdgpu_device *adev) in iceland_ih_enable_interrupts()
77 static void iceland_ih_disable_interrupts(struct amdgpu_device *adev) in iceland_ih_disable_interrupts()
104 static int iceland_ih_irq_init(struct amdgpu_device *adev) in iceland_ih_irq_init()
169 static void iceland_ih_irq_disable(struct amdgpu_device *adev) in iceland_ih_irq_disable()
188 static u32 iceland_ih_get_wptr(struct amdgpu_device *adev) in iceland_ih_get_wptr()
218 static void iceland_ih_decode_iv(struct amdgpu_device *adev, in iceland_ih_decode_iv()
248 static void iceland_ih_set_rptr(struct amdgpu_device *adev) in iceland_ih_set_rptr()
255 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_early_init()
270 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_sw_init()
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| D | cz_ih.c | 49 static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev);
58 static void cz_ih_enable_interrupts(struct amdgpu_device *adev) in cz_ih_enable_interrupts()
77 static void cz_ih_disable_interrupts(struct amdgpu_device *adev) in cz_ih_disable_interrupts()
104 static int cz_ih_irq_init(struct amdgpu_device *adev) in cz_ih_irq_init()
169 static void cz_ih_irq_disable(struct amdgpu_device *adev) in cz_ih_irq_disable()
188 static u32 cz_ih_get_wptr(struct amdgpu_device *adev) in cz_ih_get_wptr()
218 static void cz_ih_decode_iv(struct amdgpu_device *adev, in cz_ih_decode_iv()
248 static void cz_ih_set_rptr(struct amdgpu_device *adev) in cz_ih_set_rptr()
255 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_early_init()
270 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_sw_init()
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| D | nbio_v7_0.h | 31 int nbio_v7_0_init(struct amdgpu_device *adev);
32 u32 nbio_v7_0_get_atombios_scratch_regs(struct amdgpu_device *adev,
34 void nbio_v7_0_set_atombios_scratch_regs(struct amdgpu_device *adev,
36 void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable);
37 void nbio_v7_0_hdp_flush(struct amdgpu_device *adev);
38 u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev);
39 void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance,
41 void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev,
43 void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev,
45 void nbio_v7_0_ih_control(struct amdgpu_device *adev);
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| D | amdgpu_vm.h | 220 void amdgpu_vm_manager_init(struct amdgpu_device *adev);
221 void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
222 int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
224 void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
228 int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
231 int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
238 void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vmhub,
240 void amdgpu_vm_reset_all_ids(struct amdgpu_device *adev);
241 int amdgpu_vm_update_directories(struct amdgpu_device *adev,
243 int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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| D | amdgpu_virt.h | 43 int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
44 int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
45 int (*reset_gpu)(struct amdgpu_device *adev);
46 void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3);
92 int amdgpu_allocate_static_csa(struct amdgpu_device *adev);
93 int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
95 void amdgpu_virt_init_setting(struct amdgpu_device *adev);
96 uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
97 void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
98 int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);
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| D | uvd_v4_2.c | 42 static void uvd_v4_2_mc_resume(struct amdgpu_device *adev);
43 static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev);
44 static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev);
45 static int uvd_v4_2_start(struct amdgpu_device *adev);
46 static void uvd_v4_2_stop(struct amdgpu_device *adev);
49 static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,
60 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_wptr()
88 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_set_wptr()
95 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v4_2_early_init()
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| D | uvd_v5_0.c | 39 static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev);
40 static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev);
41 static int uvd_v5_0_start(struct amdgpu_device *adev);
42 static void uvd_v5_0_stop(struct amdgpu_device *adev);
45 static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev,
56 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_rptr()
70 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_wptr()
84 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_set_wptr()
91 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_early_init()
102 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_sw_init()
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| D | amdgpu.h | 175 struct amdgpu_device;
215 int amdgpu_set_clockgating_state(struct amdgpu_device *adev,
218 int amdgpu_set_powergating_state(struct amdgpu_device *adev,
221 void amdgpu_get_clockgating_state(struct amdgpu_device *adev, u32 *flags);
222 int amdgpu_wait_for_idle(struct amdgpu_device *adev,
224 bool amdgpu_is_idle(struct amdgpu_device *adev,
250 int amdgpu_ip_block_version_cmp(struct amdgpu_device *adev,
254 struct amdgpu_ip_block * amdgpu_get_ip_block(struct amdgpu_device *adev,
257 int amdgpu_ip_block_add(struct amdgpu_device *adev,
313 void (*flush_gpu_tlb)(struct amdgpu_device *adev,
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| D | soc15.c | 100 static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg) in soc15_pcie_rreg()
122 static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) in soc15_pcie_wreg()
143 static u32 soc15_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg) in soc15_uvd_ctx_rreg()
158 static void soc15_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) in soc15_uvd_ctx_wreg()
171 static u32 soc15_didt_rreg(struct amdgpu_device *adev, u32 reg) in soc15_didt_rreg()
186 static void soc15_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) in soc15_didt_wreg()
199 static u32 soc15_gc_cac_rreg(struct amdgpu_device *adev, u32 reg) in soc15_gc_cac_rreg()
211 static void soc15_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) in soc15_gc_cac_wreg()
221 static u32 soc15_se_cac_rreg(struct amdgpu_device *adev, u32 reg) in soc15_se_cac_rreg()
233 static void soc15_se_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) in soc15_se_cac_wreg()
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| D | amdgpu_gart.h | 32 struct amdgpu_device;
59 int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
60 void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
61 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
62 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
63 int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
64 void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
65 int amdgpu_gart_init(struct amdgpu_device *adev);
66 void amdgpu_gart_fini(struct amdgpu_device *adev);
67 int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
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| D | uvd_v6_0.c | 40 static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev);
41 static void uvd_v6_0_set_irq_funcs(struct amdgpu_device *adev);
42 static int uvd_v6_0_start(struct amdgpu_device *adev);
43 static void uvd_v6_0_stop(struct amdgpu_device *adev);
44 static void uvd_v6_0_set_sw_clock_gating(struct amdgpu_device *adev);
47 static void uvd_v6_0_enable_mgcg(struct amdgpu_device *adev,
59 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_get_rptr()
73 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_get_wptr()
87 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_set_wptr()
94 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v6_0_early_init()
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| D | amdgpu_dpm.h | 245 int (*get_temperature)(struct amdgpu_device *adev);
246 int (*pre_set_power_state)(struct amdgpu_device *adev);
247 int (*set_power_state)(struct amdgpu_device *adev);
248 void (*post_set_power_state)(struct amdgpu_device *adev);
249 void (*display_configuration_changed)(struct amdgpu_device *adev);
250 u32 (*get_sclk)(struct amdgpu_device *adev, bool low);
251 u32 (*get_mclk)(struct amdgpu_device *adev, bool low);
252 void (*print_power_state)(struct amdgpu_device *adev, struct amdgpu_ps *ps);
253 void (*debugfs_print_current_performance_level)(struct amdgpu_device *adev, struct seq_file *m);
254 int (*force_performance_level)(struct amdgpu_device *adev, enum amd_dpm_forced_level level);
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| D | vce_v3_0.c | 64 static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx);
65 static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev);
66 static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev);
79 struct amdgpu_device *adev = ring->adev; in vce_v3_0_ring_get_rptr()
111 struct amdgpu_device *adev = ring->adev; in vce_v3_0_ring_get_wptr()
143 struct amdgpu_device *adev = ring->adev; in vce_v3_0_ring_set_wptr()
163 static void vce_v3_0_override_vce_clock_gating(struct amdgpu_device *adev, bool override) in vce_v3_0_override_vce_clock_gating()
168 static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev, in vce_v3_0_set_vce_sw_clock_gating()
235 static int vce_v3_0_firmware_loaded(struct amdgpu_device *adev) in vce_v3_0_firmware_loaded()
265 static int vce_v3_0_start(struct amdgpu_device *adev) in vce_v3_0_start()
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| D | mmhub_v1_0.h | 26 u64 mmhub_v1_0_get_fb_location(struct amdgpu_device *adev);
27 int mmhub_v1_0_gart_enable(struct amdgpu_device *adev);
28 void mmhub_v1_0_gart_disable(struct amdgpu_device *adev);
29 void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev,
31 void mmhub_v1_0_init(struct amdgpu_device *adev);
32 int mmhub_v1_0_set_clockgating(struct amdgpu_device *adev,
34 void mmhub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags);
35 void mmhub_v1_0_initialize_power_gating(struct amdgpu_device *adev);
36 void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev,
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| D | amdgpu_gfx.h | 27 int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, uint32_t *reg);
28 void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg);
33 void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev);
35 int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev,
42 void amdgpu_gfx_kiq_fini(struct amdgpu_device *adev);
43 int amdgpu_gfx_kiq_init(struct amdgpu_device *adev,
46 int amdgpu_gfx_compute_mqd_sw_init(struct amdgpu_device *adev,
48 void amdgpu_gfx_compute_mqd_sw_fini(struct amdgpu_device *adev);
63 static inline int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, in amdgpu_gfx_queue_to_bit()
76 static inline void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit, in amdgpu_gfx_bit_to_queue()
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| D | gmc_v6_0.c | 39 static void gmc_v6_0_set_gart_funcs(struct amdgpu_device *adev);
40 static void gmc_v6_0_set_irq_funcs(struct amdgpu_device *adev);
69 static void gmc_v6_0_mc_stop(struct amdgpu_device *adev) in gmc_v6_0_mc_stop()
89 static void gmc_v6_0_mc_resume(struct amdgpu_device *adev) in gmc_v6_0_mc_resume()
103 static int gmc_v6_0_init_microcode(struct amdgpu_device *adev) in gmc_v6_0_init_microcode()
156 static int gmc_v6_0_mc_load_microcode(struct amdgpu_device *adev) in gmc_v6_0_mc_load_microcode()
219 static void gmc_v6_0_vram_gtt_location(struct amdgpu_device *adev, in gmc_v6_0_vram_gtt_location()
234 static void gmc_v6_0_mc_program(struct amdgpu_device *adev) in gmc_v6_0_mc_program()
281 static int gmc_v6_0_mc_init(struct amdgpu_device *adev) in gmc_v6_0_mc_init()
358 static void gmc_v6_0_gart_flush_gpu_tlb(struct amdgpu_device *adev, in gmc_v6_0_gart_flush_gpu_tlb()
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| D | mxgpu_ai.c | 35 static void xgpu_ai_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_ai_mailbox_send_ack()
63 static void xgpu_ai_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_ai_mailbox_set_valid()
75 static int xgpu_ai_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_ai_mailbox_rcv_msg()
98 static int xgpu_ai_poll_ack(struct amdgpu_device *adev) in xgpu_ai_poll_ack()
122 static int xgpu_ai_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_ai_poll_msg()
142 static void xgpu_ai_mailbox_trans_msg (struct amdgpu_device *adev, in xgpu_ai_mailbox_trans_msg()
170 static int xgpu_ai_send_access_requests(struct amdgpu_device *adev, in xgpu_ai_send_access_requests()
191 static int xgpu_ai_request_reset(struct amdgpu_device *adev) in xgpu_ai_request_reset()
196 static int xgpu_ai_request_full_gpu_access(struct amdgpu_device *adev, in xgpu_ai_request_full_gpu_access()
205 static int xgpu_ai_release_full_gpu_access(struct amdgpu_device *adev, in xgpu_ai_release_full_gpu_access()
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