/drivers/gpu/drm/panel/ |
D | panel-simple.c | 45 unsigned int bpc; member 151 connector->display_info.bpc = panel->desc->bpc; in panel_simple_get_fixed_modes() 408 .bpc = 8, 433 .bpc = 6, 457 .bpc = 6, 480 .bpc = 6, 504 .bpc = 6, 527 .bpc = 6, 550 .bpc = 6, 573 .bpc = 6, [all …]
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/drivers/gpu/drm/mediatek/ |
D | mtk_drm_ddp_comp.c | 75 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc, in mtk_dither_set() argument 79 if (bpc == 0) in mtk_dither_set() 82 if (bpc >= MTK_MIN_BPC) { in mtk_dither_set() 85 writel(DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) | in mtk_dither_set() 86 DITHER_ADD_LSHIFT_R(MTK_MAX_BPC - bpc) | in mtk_dither_set() 89 writel(DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) | in mtk_dither_set() 90 DITHER_ADD_LSHIFT_B(MTK_MAX_BPC - bpc) | in mtk_dither_set() 91 DITHER_LSB_ERR_SHIFT_G(MTK_MAX_BPC - bpc) | in mtk_dither_set() 92 DITHER_ADD_LSHIFT_G(MTK_MAX_BPC - bpc), in mtk_dither_set() 100 unsigned int bpc) in mtk_od_config() argument [all …]
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D | mtk_drm_ddp_comp.h | 70 unsigned int h, unsigned int vrefresh, unsigned int bpc); 94 unsigned int vrefresh, unsigned int bpc) in mtk_ddp_comp_config() argument 97 comp->funcs->config(comp, w, h, vrefresh, bpc); in mtk_ddp_comp_config() 161 void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
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D | mtk_drm_crtc.c | 225 unsigned int width, height, vrefresh, bpc = MTK_MAX_BPC; in mtk_crtc_ddp_hw_init() local 245 if (connector->display_info.bpc != 0 && in mtk_crtc_ddp_hw_init() 246 bpc > connector->display_info.bpc) in mtk_crtc_ddp_hw_init() 247 bpc = connector->display_info.bpc; in mtk_crtc_ddp_hw_init() 284 mtk_ddp_comp_config(comp, width, height, vrefresh, bpc); in mtk_crtc_ddp_hw_init()
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D | mtk_disp_color.c | 56 unsigned int bpc) in mtk_color_config() argument
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/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_connectors.c | 102 int bpc = 8; in amdgpu_connector_get_monitor_bpc() local 110 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc() 111 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc() 118 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc() 119 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc() 127 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc() 128 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc() 133 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc() 134 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc() 143 bpc = 6; in amdgpu_connector_get_monitor_bpc() [all …]
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D | atombios_crtc.c | 318 int bpc = amdgpu_crtc->bpc; in amdgpu_atombios_crtc_adjust_pll() local 359 switch (bpc) { in amdgpu_atombios_crtc_adjust_pll() 586 int bpc, in amdgpu_atombios_crtc_program_pll() argument 655 switch (bpc) { in amdgpu_atombios_crtc_program_pll() 686 switch (bpc) { in amdgpu_atombios_crtc_program_pll() 714 switch (bpc) { in amdgpu_atombios_crtc_program_pll() 757 amdgpu_crtc->bpc = 8; in amdgpu_atombios_crtc_prepare_pll() 773 amdgpu_crtc->bpc = amdgpu_connector_get_monitor_bpc(connector); in amdgpu_atombios_crtc_prepare_pll() 832 (amdgpu_crtc->bpc > 8)) in amdgpu_atombios_crtc_set_pll() 863 amdgpu_crtc->bpc, amdgpu_crtc->ss_enabled, &amdgpu_crtc->ss); in amdgpu_atombios_crtc_set_pll()
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D | atombios_crtc.h | 52 int bpc,
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D | atombios_dp.c | 245 static unsigned amdgpu_atombios_dp_convert_bpc_to_bpp(int bpc) in amdgpu_atombios_dp_convert_bpc_to_bpp() argument 247 if (bpc == 0) in amdgpu_atombios_dp_convert_bpc_to_bpp() 250 return bpc * 3; in amdgpu_atombios_dp_convert_bpc_to_bpp()
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/drivers/gpu/drm/radeon/ |
D | radeon_connectors.c | 125 int bpc = 8; in radeon_get_monitor_bpc() local 133 if (connector->display_info.bpc) in radeon_get_monitor_bpc() 134 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc() 141 if (connector->display_info.bpc) in radeon_get_monitor_bpc() 142 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc() 150 if (connector->display_info.bpc) in radeon_get_monitor_bpc() 151 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc() 156 if (connector->display_info.bpc) in radeon_get_monitor_bpc() 157 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc() 166 bpc = 6; in radeon_get_monitor_bpc() [all …]
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D | evergreen_hdmi.c | 72 int bpc = 8; in evergreen_hdmi_update_acr() local 76 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr() 79 if (bpc > 8) in evergreen_hdmi_update_acr() 317 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc) in dce4_hdmi_set_color_depth() argument 328 switch (bpc) { in dce4_hdmi_set_color_depth() 335 connector->name, bpc); in dce4_hdmi_set_color_depth()
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D | radeon_audio.c | 91 u32 offset, int bpc); 653 int bpc = 8; in radeon_hdmi_set_color_depth() local 662 bpc = radeon_crtc->bpc; in radeon_hdmi_set_color_depth() 666 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); in radeon_hdmi_set_color_depth()
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D | atombios_crtc.c | 568 int bpc = radeon_crtc->bpc; in atombios_adjust_pll() local 655 switch (bpc) { in atombios_adjust_pll() 830 int bpc, in atombios_crtc_program_pll() argument 898 switch (bpc) { in atombios_crtc_program_pll() 927 switch (bpc) { in atombios_crtc_program_pll() 969 radeon_crtc->bpc = 8; in atombios_crtc_prepare_pll() 987 radeon_crtc->bpc = radeon_get_monitor_bpc(connector); in atombios_crtc_prepare_pll() 1076 (radeon_crtc->bpc > 8)) in atombios_crtc_set_pll() 1115 radeon_crtc->bpc, radeon_crtc->ss_enabled, &radeon_crtc->ss); in atombios_crtc_set_pll()
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D | radeon_dp_mst.c | 372 if (radeon_connector->base.display_info.bpc) in radeon_dp_mst_prepare_pll() 373 radeon_crtc->bpc = radeon_connector->base.display_info.bpc; in radeon_dp_mst_prepare_pll() 375 radeon_crtc->bpc = 8; in radeon_dp_mst_prepare_pll()
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D | radeon_audio.h | 59 void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc);
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D | atombios_dp.c | 295 static int convert_bpc_to_bpp(int bpc) in convert_bpc_to_bpp() argument 297 if (bpc == 0) in convert_bpc_to_bpp() 300 return bpc * 3; in convert_bpc_to_bpp()
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D | rs600.c | 159 int bpc = 0; in avivo_program_fmt() local 165 bpc = radeon_get_monitor_bpc(connector); in avivo_program_fmt() 173 if (bpc == 0) in avivo_program_fmt() 176 switch (bpc) { in avivo_program_fmt()
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/drivers/gpu/drm/ |
D | drm_dp_helper.c | 490 int bpc; in drm_dp_downstream_max_bpc() local 500 bpc = port_cap[2] & DP_DS_MAX_BPC_MASK; in drm_dp_downstream_max_bpc() 502 switch (bpc) { in drm_dp_downstream_max_bpc() 546 int bpc; in drm_dp_downstream_debug() local 609 bpc = drm_dp_downstream_max_bpc(dpcd, port_cap); in drm_dp_downstream_debug() 611 if (bpc > 0) in drm_dp_downstream_debug() 612 seq_printf(m, "\t\tMax bpc: %d\n", bpc); in drm_dp_downstream_debug()
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D | drm_edid.c | 4286 info->bpc = 8; in drm_parse_hdmi_deep_color_info() 4320 info->bpc = dc_bpc; in drm_parse_hdmi_deep_color_info() 4409 info->bpc = 0; in drm_add_display_info() 4430 if ((info->bpc == 0) && (edid->revision < 4) && in drm_add_display_info() 4432 info->bpc = 8; in drm_add_display_info() 4434 connector->name, info->bpc); in drm_add_display_info() 4443 info->bpc = 6; in drm_add_display_info() 4446 info->bpc = 8; in drm_add_display_info() 4449 info->bpc = 10; in drm_add_display_info() 4452 info->bpc = 12; in drm_add_display_info() [all …]
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/drivers/spi/ |
D | spi-bcm-qspi.c | 342 int bpp, int bpc, int flex_mode) in bcm_qspi_bspi_set_xfer_params() argument 345 bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_CYCLE, bpc); in bcm_qspi_bspi_set_xfer_params() 355 int bpc = 0, bpp = 0; in bcm_qspi_bspi_set_flex_mode() local 377 bpc = 0x00000001; in bcm_qspi_bspi_set_flex_mode() 379 bpc |= 0x00010100; /* address and mode are 2-bit */ in bcm_qspi_bspi_set_flex_mode() 384 bpc = 0x00000002; in bcm_qspi_bspi_set_flex_mode() 386 bpc |= 0x00020200; /* address and mode are 4-bit */ in bcm_qspi_bspi_set_flex_mode() 394 bcm_qspi_bspi_set_xfer_params(qspi, command, bpp, bpc, flex_mode); in bcm_qspi_bspi_set_flex_mode()
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/drivers/gpu/drm/rockchip/ |
D | cdn-dp-core.c | 304 u8 lanes, bpc; in cdn_dp_connector_mode_valid() local 310 switch (display_info->bpc) { in cdn_dp_connector_mode_valid() 312 bpc = 10; in cdn_dp_connector_mode_valid() 315 bpc = 6; in cdn_dp_connector_mode_valid() 318 bpc = 8; in cdn_dp_connector_mode_valid() 322 requested = mode->clock * bpc * 3 / 1000; in cdn_dp_connector_mode_valid() 575 switch (display_info->bpc) { in cdn_dp_encoder_mode_set()
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/drivers/gpu/drm/nouveau/ |
D | nouveau_connector.c | 876 if (nv_connector->edid && connector->display_info.bpc) in nouveau_connector_detect_depth() 881 connector->display_info.bpc = 6; in nouveau_connector_detect_depth() 887 connector->display_info.bpc = 8; in nouveau_connector_detect_depth() 891 connector->display_info.bpc = 6; in nouveau_connector_detect_depth() 896 connector->display_info.bpc = 8; in nouveau_connector_detect_depth() 911 connector->display_info.bpc = 8; in nouveau_connector_detect_depth() 1048 clock = clock * (connector->display_info.bpc * 3) / 10; in nouveau_connector_mode_valid()
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/drivers/video/console/ |
D | sticore.c | 496 unsigned int size, bpc; in sti_select_fbfont() local 511 bpc = ((fbfont->width+7)/8) * fbfont->height; in sti_select_fbfont() 512 size = bpc * 256; in sti_select_fbfont() 524 nf->bytes_per_char = bpc; in sti_select_fbfont() 531 memcpy(dest, fbfont->data, bpc*256); in sti_select_fbfont()
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/drivers/gpu/drm/msm/edp/ |
D | edp_connector.c | 88 if (connector->display_info.bpc > 8) in edp_connector_mode_valid()
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/drivers/gpu/drm/tegra/ |
D | sor.c | 203 unsigned int bpc; member 866 switch (state->bpc) { in tegra_sor_mode_set() 1523 config.bits_per_pixel = state->bpc * 3; in tegra_sor_edp_enable() 1813 switch (info->bpc) { in tegra_sor_encoder_atomic_check() 1816 state->bpc = info->bpc; in tegra_sor_encoder_atomic_check() 1820 DRM_DEBUG_KMS("%u bits-per-color not supported\n", info->bpc); in tegra_sor_encoder_atomic_check() 1821 state->bpc = 8; in tegra_sor_encoder_atomic_check() 2228 switch (state->bpc) { in tegra_sor_hdmi_enable() 2238 WARN(1, "%u bits-per-color not supported\n", state->bpc); in tegra_sor_hdmi_enable()
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