/drivers/staging/ccree/ |
D | ssi_hash.c | 79 int hw_mode; member 104 int hw_mode; member 182 if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { in ssi_hash_map_request() 212 if ((ctx->hw_mode == DRV_CIPHER_XCBC_MAC) || (ctx->hw_mode == DRV_CIPHER_CMAC)) { in ssi_hash_map_request() 248 if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { in ssi_hash_map_request() 451 set_cipher_mode(&desc[idx], ctx->hw_mode); in ssi_hash_digest() 465 set_cipher_mode(&desc[idx], ctx->hw_mode); in ssi_hash_digest() 487 set_cipher_mode(&desc[idx], ctx->hw_mode); in ssi_hash_digest() 497 set_cipher_mode(&desc[idx], ctx->hw_mode); in ssi_hash_digest() 507 set_cipher_mode(&desc[idx], ctx->hw_mode); in ssi_hash_digest() [all …]
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/drivers/spi/ |
D | spi-fsl-spi.c | 94 if (cs->hw_mode == mpc8xxx_spi_read_reg(mode)) in fsl_spi_change_mode() 101 mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE); in fsl_spi_change_mode() 107 mpc8xxx_spi_write_reg(mode, cs->hw_mode); in fsl_spi_change_mode() 262 cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16 in fsl_spi_setup_transfer() 265 cs->hw_mode |= SPMODE_LEN(bits_per_word); in fsl_spi_setup_transfer() 268 cs->hw_mode |= SPMODE_DIV16; in fsl_spi_setup_transfer() 281 cs->hw_mode |= SPMODE_PM(pm); in fsl_spi_setup_transfer() 426 u32 hw_mode; in fsl_spi_setup() local 442 hw_mode = cs->hw_mode; /* Save original settings */ in fsl_spi_setup() 443 cs->hw_mode = mpc8xxx_spi_read_reg(®_base->mode); in fsl_spi_setup() [all …]
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D | spi-fsl-espi.c | 117 u32 hw_mode; member 334 u32 hw_mode_old = cs->hw_mode; in fsl_espi_setup_transfer() 337 cs->hw_mode &= ~(CSMODE_LEN(0xF) | CSMODE_DIV16 | CSMODE_PM(0xF)); in fsl_espi_setup_transfer() 339 cs->hw_mode |= CSMODE_LEN(bits_per_word - 1); in fsl_espi_setup_transfer() 344 cs->hw_mode |= CSMODE_DIV16; in fsl_espi_setup_transfer() 348 cs->hw_mode |= CSMODE_PM(pm); in fsl_espi_setup_transfer() 351 if (cs->hw_mode != hw_mode_old) in fsl_espi_setup_transfer() 353 cs->hw_mode); in fsl_espi_setup_transfer() 497 cs->hw_mode = fsl_espi_read_reg(espi, ESPI_SPMODEx(spi->chip_select)); in fsl_espi_setup() 499 cs->hw_mode &= ~(CSMODE_CP_BEGIN_EDGECLK | CSMODE_CI_INACTIVEHIGH in fsl_espi_setup() [all …]
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D | spi-fsl-lib.h | 83 u32 hw_mode; /* Holds HW mode register settings */ member
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/drivers/net/ethernet/qlogic/qed/ |
D | qed_dev.c | 810 p_hwfn->hw_info.hw_mode); in qed_qm_reconf() 1141 int hw_mode = 0; in qed_calc_hw_mode() local 1144 hw_mode |= 1 << MODE_BB; in qed_calc_hw_mode() 1146 hw_mode |= 1 << MODE_K2; in qed_calc_hw_mode() 1155 hw_mode |= 1 << MODE_PORTS_PER_ENG_1; in qed_calc_hw_mode() 1158 hw_mode |= 1 << MODE_PORTS_PER_ENG_2; in qed_calc_hw_mode() 1161 hw_mode |= 1 << MODE_PORTS_PER_ENG_4; in qed_calc_hw_mode() 1172 hw_mode |= 1 << MODE_MF_SI; in qed_calc_hw_mode() 1175 hw_mode |= 1 << MODE_MF_SD; in qed_calc_hw_mode() 1179 hw_mode |= 1 << MODE_MF_SI; in qed_calc_hw_mode() [all …]
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D | qed.h | 345 u32 hw_mode; member
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D | qed_mcp.c | 1554 if ((p_hwfn->hw_info.hw_mode & BIT(MODE_MF_SD)) && in qed_mcp_update_stag()
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D | qed_sriov.c | 836 p_hwfn->hw_info.hw_mode); in qed_iov_enable_vf_access()
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/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_dpm.c | 130 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { in amdgpu_dpm_get_vblank_time() 132 amdgpu_crtc->hw_mode.crtc_htotal * in amdgpu_dpm_get_vblank_time() 133 (amdgpu_crtc->hw_mode.crtc_vblank_end - in amdgpu_dpm_get_vblank_time() 134 amdgpu_crtc->hw_mode.crtc_vdisplay + in amdgpu_dpm_get_vblank_time() 137 vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; in amdgpu_dpm_get_vblank_time() 156 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { in amdgpu_dpm_get_vrefresh() 157 vrefresh = drm_mode_vrefresh(&amdgpu_crtc->hw_mode); in amdgpu_dpm_get_vrefresh()
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D | amdgpu_cgs.c | 882 amdgpu_crtc->hw_mode.clock) { in amdgpu_cgs_get_active_displays_info() 883 line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) / in amdgpu_cgs_get_active_displays_info() 884 amdgpu_crtc->hw_mode.clock; in amdgpu_cgs_get_active_displays_info() 885 vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end - in amdgpu_cgs_get_active_displays_info() 886 amdgpu_crtc->hw_mode.crtc_vdisplay + in amdgpu_cgs_get_active_displays_info() 889 mode_info->refresh_rate = drm_mode_vrefresh(&amdgpu_crtc->hw_mode); in amdgpu_cgs_get_active_displays_info()
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D | amdgpu_mode.h | 399 struct drm_display_mode hw_mode; member
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D | dce_virtual.c | 207 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_virtual_crtc_mode_set()
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D | dce_v8_0.c | 2564 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v8_0_crtc_mode_set()
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D | dce_v6_0.c | 2538 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v6_0_crtc_mode_set()
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D | dce_v11_0.c | 2756 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v11_0_crtc_mode_set()
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D | dce_v10_0.c | 2653 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v10_0_crtc_mode_set()
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/drivers/gpu/drm/radeon/ |
D | r600_dpm.c | 168 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vblank_time() 170 radeon_crtc->hw_mode.crtc_htotal * in r600_dpm_get_vblank_time() 171 (radeon_crtc->hw_mode.crtc_vblank_end - in r600_dpm_get_vblank_time() 172 radeon_crtc->hw_mode.crtc_vdisplay + in r600_dpm_get_vblank_time() 175 vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; in r600_dpm_get_vblank_time() 194 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vrefresh() 195 vrefresh = drm_mode_vrefresh(&radeon_crtc->hw_mode); in r600_dpm_get_vrefresh()
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D | radeon_mode.h | 373 struct drm_display_mode hw_mode; member
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D | atombios_crtc.c | 2076 radeon_crtc->hw_mode = *adjusted_mode; in atombios_crtc_mode_set()
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D | si.c | 5190 bool hw_mode = true; in si_init_uvd_internal_cg() local 5192 if (hw_mode) { in si_init_uvd_internal_cg()
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/drivers/net/ethernet/ti/ |
D | davinci_cpdma.c | 79 u32 hw_mode; member 1021 mode = desc_read(prev, hw_mode); in __cpdma_chan_submit() 1024 desc_write(prev, hw_mode, mode & ~CPDMA_DESC_EOQ); in __cpdma_chan_submit() 1082 writel_relaxed(mode | len, &desc->hw_mode); in cpdma_chan_submit() 1155 status = desc_read(desc, hw_mode); in __cpdma_chan_process()
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/drivers/usb/dwc3/ |
D | core.c | 60 unsigned int hw_mode; in dwc3_get_dr_mode() local 66 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode() 68 switch (hw_mode) { in dwc3_get_dr_mode()
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/drivers/usb/host/ |
D | imx21-hcd.c | 1701 u32 hw_mode = USBOTG_HWMODE_CRECFG_HOST; in imx21_hc_start() local 1704 hw_mode |= ((imx21->pdata->host_xcvr << USBOTG_HWMODE_HOSTXCVR_SHIFT) & in imx21_hc_start() 1706 hw_mode |= ((imx21->pdata->otg_xcvr << USBOTG_HWMODE_OTGXCVR_SHIFT) & in imx21_hc_start() 1723 writel(hw_mode, imx21->regs + USBOTG_HWMODE); in imx21_hc_start()
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/drivers/staging/rtl8188eu/include/ |
D | rtw_mlme_ext.h | 396 enum hw_mode {IEEE80211G} mode; enum
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/drivers/staging/rtl8723bs/include/ |
D | rtw_mlme_ext.h | 475 enum hw_mode {IEEE80211G, IEEE80211A} mode; enum
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