| /drivers/gpu/drm/i915/ |
| D | intel_audio.c | 105 audio_config_dp_get_n_m(struct intel_crtc *intel_crtc, int rate) in audio_config_dp_get_n_m() argument
111 intel_crtc->config->port_clock == dp_aud_n_m[i].clock) in audio_config_dp_get_n_m()
299 hsw_dp_audio_config_update(struct intel_crtc *intel_crtc, enum port port, in hsw_dp_audio_config_update() argument
302 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in hsw_dp_audio_config_update()
305 const struct dp_aud_n_m *nm = audio_config_dp_get_n_m(intel_crtc, rate); in hsw_dp_audio_config_update()
306 enum pipe pipe = intel_crtc->pipe; in hsw_dp_audio_config_update()
343 hsw_hdmi_audio_config_update(struct intel_crtc *intel_crtc, enum port port, in hsw_hdmi_audio_config_update() argument
346 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in hsw_hdmi_audio_config_update()
349 enum pipe pipe = intel_crtc->pipe; in hsw_hdmi_audio_config_update()
383 hsw_audio_config_update(struct intel_crtc *intel_crtc, enum port port, in hsw_audio_config_update() argument
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| D | intel_dpio_phy.c | 645 struct intel_crtc *intel_crtc = to_intel_crtc(dport->base.base.crtc); in chv_set_phy_signal_level() local
647 enum pipe pipe = intel_crtc->pipe; in chv_set_phy_signal_level()
660 if (intel_crtc->config->lane_count > 2) { in chv_set_phy_signal_level()
673 if (intel_crtc->config->lane_count > 2) { in chv_set_phy_signal_level()
681 for (i = 0; i < intel_crtc->config->lane_count; i++) { in chv_set_phy_signal_level()
689 for (i = 0; i < intel_crtc->config->lane_count; i++) { in chv_set_phy_signal_level()
712 for (i = 0; i < intel_crtc->config->lane_count; i++) { in chv_set_phy_signal_level()
726 if (intel_crtc->config->lane_count > 2) { in chv_set_phy_signal_level()
741 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in chv_data_lane_soft_reset()
785 struct intel_crtc *intel_crtc = in chv_phy_pre_pll_enable() local
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| D | intel_display.c | 119 static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
121 static void ironlake_pch_clock_get(struct intel_crtc *crtc,
127 static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc);
128 static void intel_set_pipe_timings(struct intel_crtc *intel_crtc);
129 static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc);
130 static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
136 static void vlv_prepare_pll(struct intel_crtc *crtc,
138 static void chv_prepare_pll(struct intel_crtc *crtc,
142 static void intel_crtc_init_scalers(struct intel_crtc *crtc,
144 static void skylake_pfit_enable(struct intel_crtc *crtc);
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| D | intel_atomic.c | 218 struct intel_crtc *intel_crtc, in intel_atomic_setup_scalers() argument
245 if (num_scalers_need > intel_crtc->num_scalers){ in intel_atomic_setup_scalers()
247 num_scalers_need, intel_crtc->num_scalers); in intel_atomic_setup_scalers()
263 idx = intel_crtc->base.base.id; in intel_atomic_setup_scalers()
300 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) { in intel_atomic_setup_scalers()
311 for (j = 0; j < intel_crtc->num_scalers; j++) { in intel_atomic_setup_scalers()
316 intel_crtc->pipe, *scaler_id, name, idx); in intel_atomic_setup_scalers()
330 } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { in intel_atomic_setup_scalers()
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| D | intel_dpll_mgr.h | 36 struct intel_crtc;
274 struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
278 struct intel_crtc *crtc,
280 void intel_prepare_shared_dpll(struct intel_crtc *crtc);
281 void intel_enable_shared_dpll(struct intel_crtc *crtc);
282 void intel_disable_shared_dpll(struct intel_crtc *crtc);
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| D | intel_fbdev.c | 538 struct intel_crtc *intel_crtc; in intel_fbdev_init_bios() local
545 intel_crtc = to_intel_crtc(crtc); in intel_fbdev_init_bios()
549 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
555 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
570 intel_crtc = to_intel_crtc(crtc); in intel_fbdev_init_bios()
574 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
579 pipe_name(intel_crtc->pipe)); in intel_fbdev_init_bios()
586 cur_size = intel_crtc->config->base.adjusted_mode.crtc_hdisplay; in intel_fbdev_init_bios()
590 pipe_name(intel_crtc->pipe), in intel_fbdev_init_bios()
596 cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay; in intel_fbdev_init_bios()
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| D | intel_fifo_underrun.c | 54 struct intel_crtc *crtc; in ivb_can_enable_err_int()
73 struct intel_crtc *crtc; in cpt_can_enable_serr_int()
87 static void i9xx_check_fifo_underruns(struct intel_crtc *crtc) in i9xx_check_fifo_underruns()
137 static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc) in ivybridge_check_fifo_underruns()
203 static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc) in cpt_check_pch_fifo_underruns()
251 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in __intel_set_cpu_fifo_underrun_reporting()
319 struct intel_crtc *crtc = in intel_set_pch_fifo_underrun_reporting()
363 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in intel_cpu_fifo_underrun_irq_handler()
414 struct intel_crtc *crtc; in intel_check_cpu_fifo_underruns()
441 struct intel_crtc *crtc; in intel_check_pch_fifo_underruns()
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| D | intel_drv.h | 788 struct intel_crtc { struct
865 struct intel_crtc *crtc);
892 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
1123 static inline struct intel_crtc *
1129 static inline struct intel_crtc *
1234 int intel_get_crtc_scanline(struct intel_crtc *crtc);
1251 void hsw_fdi_link_train(struct intel_crtc *crtc,
1266 struct intel_crtc *intel_crtc);
1310 enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
1366 const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in intel_wait_for_vblank_if_active()
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| D | intel_color.c | 110 static void i9xx_load_ycbcr_conversion_matrix(struct intel_crtc *intel_crtc) in i9xx_load_ycbcr_conversion_matrix() argument
112 int pipe = intel_crtc->pipe; in i9xx_load_ycbcr_conversion_matrix()
113 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in i9xx_load_ycbcr_conversion_matrix()
139 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in i9xx_load_csc_matrix() local
140 int i, pipe = intel_crtc->pipe; in i9xx_load_csc_matrix()
145 i9xx_load_ycbcr_conversion_matrix(intel_crtc); in i9xx_load_csc_matrix()
314 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in i9xx_load_luts_internal() local
315 enum pipe pipe = intel_crtc->pipe; in i9xx_load_luts_internal()
362 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in haswell_load_luts() local
373 hsw_disable_ips(intel_crtc); in haswell_load_luts()
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| D | intel_psr.c | 81 struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc); in intel_psr_write_vsc()
377 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_psr_match_conditions() local
379 &intel_crtc->config->base.adjusted_mode; in intel_psr_match_conditions()
412 I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config->cpu_transcoder)) & in intel_psr_match_conditions()
440 (intel_crtc->config->pipe_src_w > 3200 || in intel_psr_match_conditions()
441 intel_crtc->config->pipe_src_h > 2000)) { in intel_psr_match_conditions()
496 struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); in intel_psr_enable()
593 struct intel_crtc *intel_crtc = in vlv_psr_disable() local
600 VLV_PSRSTAT(intel_crtc->pipe), in vlv_psr_disable()
606 val = I915_READ(VLV_PSRCTL(intel_crtc->pipe)); in vlv_psr_disable()
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| D | intel_hdmi.c | 200 struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); in ibx_write_infoframe() local
201 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_write_infoframe()
216 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in ibx_write_infoframe()
221 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in ibx_write_infoframe()
260 struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); in cpt_write_infoframe() local
261 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_write_infoframe()
279 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in cpt_write_infoframe()
284 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in cpt_write_infoframe()
318 struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); in vlv_write_infoframe() local
319 i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); in vlv_write_infoframe()
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| D | intel_fbc.c | 72 static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc) in get_crtc_fence_y_offset()
405 struct intel_crtc *crtc = fbc->crtc; in intel_fbc_work_fn()
455 static void intel_fbc_schedule_activation(struct intel_crtc *crtc) in intel_fbc_schedule_activation()
497 static bool multiple_pipes_ok(struct intel_crtc *crtc, in multiple_pipes_ok()
566 static int intel_fbc_alloc_cfb(struct intel_crtc *crtc) in intel_fbc_alloc_cfb()
698 static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) in intel_fbc_hw_tracking_covers_screen()
723 static void intel_fbc_update_state_cache(struct intel_crtc *crtc, in intel_fbc_update_state_cache()
757 static bool intel_fbc_can_activate(struct intel_crtc *crtc) in intel_fbc_can_activate()
862 static void intel_fbc_get_reg_params(struct intel_crtc *crtc, in intel_fbc_get_reg_params()
893 void intel_fbc_pre_update(struct intel_crtc *crtc, in intel_fbc_pre_update()
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| D | intel_pm.c | 490 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in vlv_get_fifo_size()
838 static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv) in single_enabled_crtc()
840 struct intel_crtc *crtc, *enabled = NULL; in single_enabled_crtc()
853 static void pineview_update_wm(struct intel_crtc *unused_crtc) in pineview_update_wm()
856 struct intel_crtc *crtc; in pineview_update_wm()
1299 static void g4x_invalidate_wms(struct intel_crtc *crtc, in g4x_invalidate_wms()
1326 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in g4x_compute_pipe_wm()
1414 struct intel_crtc *crtc, in g4x_compute_intermediate_wm()
1480 struct intel_crtc *crtc; in g4x_merge_wm()
1546 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in g4x_initial_watermarks()
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| D | intel_dpll_mgr.c | 134 void intel_prepare_shared_dpll(struct intel_crtc *crtc) in intel_prepare_shared_dpll()
161 void intel_enable_shared_dpll(struct intel_crtc *crtc) in intel_enable_shared_dpll()
206 void intel_disable_shared_dpll(struct intel_crtc *crtc) in intel_disable_shared_dpll()
243 intel_find_shared_dpll(struct intel_crtc *crtc, in intel_find_shared_dpll()
291 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_reference_shared_dpll()
405 struct intel_crtc *crtc; in ibx_pch_dpll_disable()
419 ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, in ibx_get_dpll()
752 struct intel_crtc *crtc, in hsw_ddi_hdmi_get_dpll()
807 hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, in hsw_get_dpll()
1287 static bool skl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc, in skl_ddi_hdmi_pll_dividers()
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| D | intel_pipe_crc.c | 249 struct intel_crtc *crtc; in i9xx_pipe_crc_auto_source()
513 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A); in hsw_trans_edp_pipe_A_crc_wa()
609 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in pipe_crc_set_source()
670 struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, in pipe_crc_set_source()
917 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_crtc_set_crc_source() local
945 hsw_disable_ips(intel_crtc); in intel_crtc_set_crc_source()
959 hsw_enable_ips(intel_crtc); in intel_crtc_set_crc_source()
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| D | intel_lvds.c | 235 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_pre_enable_lvds()
392 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_lvds_compute_config() local
396 if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) { in intel_lvds_compute_config()
424 intel_pch_panel_fitting(intel_crtc, pipe_config, in intel_lvds_compute_config()
427 intel_gmch_panel_fitting(intel_crtc, pipe_config, in intel_lvds_compute_config()
848 struct intel_crtc *crtc; in intel_lvds_init()
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| D | intel_ddi.c | 818 void hsw_fdi_link_train(struct intel_crtc *crtc, in hsw_fdi_link_train()
962 intel_ddi_get_crtc_encoder(struct intel_crtc *crtc) in intel_ddi_get_crtc_encoder()
985 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_get_crtc_new_encoder()
1388 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_set_pipe_settings()
1426 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_set_vc_payload_alloc()
1440 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_enable_transcoder_func()
1531 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_disable_transcoder_func()
1696 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_enable_pipe_clock()
2433 struct intel_crtc *intel_crtc) in intel_ddi_is_audio_enabled() argument
2439 if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe)) in intel_ddi_is_audio_enabled()
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| D | intel_dsi.c | 311 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dsi_compute_config()
665 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_dsi_port_enable() local
704 temp |= intel_crtc->pipe ? in intel_dsi_port_enable()
1076 struct intel_crtc *intel_crtc; in bxt_dsi_get_pipe_config() local
1087 intel_crtc = to_intel_crtc(encoder->base.crtc); in bxt_dsi_get_pipe_config()
1088 adjusted_mode_sw = &intel_crtc->config->base.adjusted_mode; in bxt_dsi_get_pipe_config()
1378 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dsi_prepare() local
1386 DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe)); in intel_dsi_prepare()
1413 enum pipe pipe = intel_crtc->pipe; in intel_dsi_prepare()
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| D | intel_tv.c | 983 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_tv_pre_enable() local
1027 if (intel_crtc->pipe == 1) in intel_tv_pre_enable()
1078 assert_pipe_disabled(dev_priv, intel_crtc->pipe); in intel_tv_pre_enable()
1140 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_tv_detect_type() local
1162 if (intel_crtc->pipe == 1) in intel_tv_detect_type()
1190 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); in intel_tv_detect_type()
1220 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); in intel_tv_detect_type()
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| D | intel_dp.c | 1648 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dp_compute_config() local
1704 intel_gmch_panel_fitting(intel_crtc, pipe_config, in intel_dp_compute_config()
1707 intel_pch_panel_fitting(intel_crtc, pipe_config, in intel_dp_compute_config()
1870 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_dp_prepare()
2466 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in ironlake_edp_pll_on()
2506 struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); in ironlake_edp_pll_off()
2618 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_dp_get_config()
2875 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_enable_dp()
3019 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in vlv_init_panel_power_sequencer()
3597 struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); in intel_dp_link_down()
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| D | i915_trace.h | 94 TP_PROTO(struct intel_crtc *crtc, const struct g4x_wm_values *wm),
143 TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm),
183 TP_PROTO(struct intel_crtc *crtc, u32 sprite0_start, u32 sprite1_start, u32 fifo_size),
214 TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc),
244 TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc),
270 TP_PROTO(struct intel_crtc *crtc),
296 TP_PROTO(struct intel_crtc *crtc),
321 TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end),
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| D | i915_drv.h | 507 #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ argument
511 for_each_if ((intel_plane)->pipe == (intel_crtc)->pipe)
513 #define for_each_intel_crtc(dev, intel_crtc) \ argument
514 list_for_each_entry(intel_crtc, \
518 #define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \ argument
519 list_for_each_entry(intel_crtc, \
522 for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base)))
674 struct intel_crtc;
687 struct intel_crtc *intel_crtc,
696 void (*update_wm)(struct intel_crtc *crtc);
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| D | i915_debugfs.c | 2920 struct intel_crtc *intel_crtc, in intel_encoder_info() argument
2925 struct drm_crtc *crtc = &intel_crtc->base; in intel_encoder_info()
2948 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_crtc_info() argument
2952 struct drm_crtc *crtc = &intel_crtc->base; in intel_crtc_info()
2964 intel_encoder_info(m, intel_crtc, intel_encoder); in intel_crtc_info()
3107 static void intel_plane_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_plane_info() argument
3113 for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { in intel_plane_info()
3150 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_scaler_info() argument
3153 int num_scalers = intel_crtc->num_scalers; in intel_scaler_info()
3156 pipe_config = to_intel_crtc_state(intel_crtc->base.state); in intel_scaler_info()
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| D | intel_sprite.c | 85 void intel_pipe_update_start(struct intel_crtc *crtc) in intel_pipe_update_start()
180 void intel_pipe_update_end(struct intel_crtc *crtc) in intel_pipe_update_end()
310 skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in skl_disable_plane()
552 vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in vlv_disable_plane()
710 ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in ivb_disable_plane()
861 g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) in g4x_disable_plane()
904 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_check_sprite_plane()
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| D | intel_dvo.c | 265 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dvo_pre_enable()
394 struct intel_crtc *crtc; in intel_dvo_get_current_mode()
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