| /drivers/cpufreq/ |
| D | s3c2440-cpufreq.c | 36 static struct clk *fclk; variable
60 unsigned long hclk, fclk, armclk; in s3c2440_cpufreq_calcdivs() local
63 fclk = cfg->freq.fclk; in s3c2440_cpufreq_calcdivs()
68 __func__, fclk, armclk, hclk_max); in s3c2440_cpufreq_calcdivs()
70 if (armclk > fclk) { in s3c2440_cpufreq_calcdivs()
72 armclk = fclk; in s3c2440_cpufreq_calcdivs()
76 if (armclk < fclk && armclk < hclk_max) in s3c2440_cpufreq_calcdivs()
83 hclk = (fclk / hdiv); in s3c2440_cpufreq_calcdivs()
113 if (armclk < fclk) { in s3c2440_cpufreq_calcdivs()
196 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2440_cpufreq_setdivs()
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| D | s3c2412-cpufreq.c | 37 static struct clk *fclk; variable
46 unsigned long hclk, fclk, armclk, armdiv_clk; in s3c2412_cpufreq_calcdivs() local
49 fclk = cfg->freq.fclk; in s3c2412_cpufreq_calcdivs()
60 __func__, fclk, armclk, hclk_max); in s3c2412_cpufreq_calcdivs()
62 __func__, cfg->freq.fclk, cfg->freq.armclk, in s3c2412_cpufreq_calcdivs()
65 armdiv = fclk / armclk; in s3c2412_cpufreq_calcdivs()
73 armdiv_clk = fclk / armdiv; in s3c2412_cpufreq_calcdivs()
142 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2412_cpufreq_setdivs()
172 .fclk = 200000000,
206 fclk = clk_get(NULL, "fclk"); in s3c2412_cpufreq_add()
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| D | s3c2410-cpufreq.c | 48 unsigned long hclk, fclk, pclk; in s3c2410_cpufreq_calcdivs() local
52 fclk = cfg->freq.fclk; in s3c2410_cpufreq_calcdivs()
55 cfg->freq.armclk = fclk; in s3c2410_cpufreq_calcdivs()
58 __func__, fclk, hclk_max); in s3c2410_cpufreq_calcdivs()
60 hdiv = (fclk > cfg->max.hclk) ? 2 : 1; in s3c2410_cpufreq_calcdivs()
61 hclk = fclk / hdiv; in s3c2410_cpufreq_calcdivs()
87 .fclk = 200000000,
140 s3c2410_cpufreq_info.max.fclk = 266000000; in s3c2410a_cpufreq_add()
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| D | s3c24xx-cpufreq.c | 67 unsigned long fclk, pclk, hclk, armclk; in s3c_cpufreq_getcur() local
69 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); in s3c_cpufreq_getcur()
75 cfg->pll.frequency = fclk; in s3c_cpufreq_getcur()
79 cfg->divs.h_divisor = fclk / hclk; in s3c_cpufreq_getcur()
80 cfg->divs.p_divisor = fclk / pclk; in s3c_cpufreq_getcur()
87 cfg->freq.fclk = pll; in s3c_cpufreq_calc()
107 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk, in s3c_cpufreq_show()
177 cpu_new.freq.fclk = cpu_new.pll.frequency; in s3c_cpufreq_settarget()
212 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk); in s3c_cpufreq_settarget()
231 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) { in s3c_cpufreq_settarget()
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| D | s3c24xx-cpufreq-debugfs.c | 36 f->fclk, f->hclk, f->pclk, f->armclk); in show_max()
89 seq_printf(seq, " FCLK %ld Hz\n", cfg->freq.fclk); in info_show()
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| /drivers/usb/host/ |
| D | ehci-sh.c | 17 struct clk *iclk, *fclk; member
125 priv->fclk = devm_clk_get(&pdev->dev, "usb_fck"); in ehci_hcd_sh_probe()
126 if (IS_ERR(priv->fclk)) in ehci_hcd_sh_probe()
127 priv->fclk = NULL; in ehci_hcd_sh_probe()
133 clk_enable(priv->fclk); in ehci_hcd_sh_probe()
153 clk_disable(priv->fclk); in ehci_hcd_sh_probe()
171 clk_disable(priv->fclk); in ehci_hcd_sh_remove()
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| D | ohci-at91.c | 53 struct clk *fclk; member
80 clk_set_rate(ohci_at91->fclk, 48000000); in at91_start_clock()
83 clk_prepare_enable(ohci_at91->fclk); in at91_start_clock()
92 clk_disable_unprepare(ohci_at91->fclk); in at91_stop_clock()
202 ohci_at91->fclk = devm_clk_get(dev, "uhpck"); in usb_hcd_at91_probe()
203 if (IS_ERR(ohci_at91->fclk)) { in usb_hcd_at91_probe()
205 retval = PTR_ERR(ohci_at91->fclk); in usb_hcd_at91_probe()
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| /drivers/media/dvb-frontends/ |
| D | s5h1420.c | 53 u32 fclk; member
382 tmp = state->fclk / tmp; in s5h1420_read_status()
489 do_div(val, (state->fclk / 1000)); in s5h1420_setsymbolrate()
516 val = -(int) ((freqoffset * (1<<24)) / (state->fclk / 1000000)); in s5h1420_setfreqoffset()
544 val = (((-val) * (state->fclk/1000000)) / (1<<24)); in s5h1420_getfreqoffset()
682 state->fclk = 80000000; in s5h1420_set_frontend()
684 state->fclk = 59000000; in s5h1420_set_frontend()
686 state->fclk = 86000000; in s5h1420_set_frontend()
688 state->fclk = 88000000; in s5h1420_set_frontend()
690 state->fclk = 44000000; in s5h1420_set_frontend()
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| D | cx24110.c | 244 u32 tmp, fclk, BDRI; in cx24110_set_symbolrate() local
264 fclk=90999000UL/2; in cx24110_set_symbolrate()
268 fclk=60666000UL; in cx24110_set_symbolrate()
272 fclk=80888000UL; in cx24110_set_symbolrate()
276 fclk=90999000UL; in cx24110_set_symbolrate()
278 dprintk("cx24110 debug: fclk %d Hz\n",fclk); in cx24110_set_symbolrate()
288 BDRI=fclk>>2; in cx24110_set_symbolrate()
301 dprintk("fclk = %d\n", fclk); in cx24110_set_symbolrate()
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| D | mb86a20s.h | 31 u32 fclk; member
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| D | mb86a20s.c | 1764 u32 fclk; in mb86a20s_initfe() local
1799 fclk = state->config->fclk; in mb86a20s_initfe()
1800 if (!fclk) in mb86a20s_initfe()
1801 fclk = 32571428; in mb86a20s_initfe()
1811 do_div(pll, 63 * fclk); in mb86a20s_initfe()
1826 __func__, fclk, state->if_freq, (long long)pll); in mb86a20s_initfe()
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| /drivers/pwm/ |
| D | pwm-omap-dmtimer.c | 101 struct clk *fclk; in pwm_omap_dmtimer_config() local
116 fclk = omap->pdata->get_fclk(omap->dm_timer); in pwm_omap_dmtimer_config()
117 if (!fclk) { in pwm_omap_dmtimer_config()
122 clk_rate = clk_get_rate(fclk); in pwm_omap_dmtimer_config()
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| /drivers/net/hamradio/ |
| D | baycom_epp.c | 182 unsigned int fclk; member
317 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, in eppconfig()
318 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps), in eppconfig()
987 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0); in baycom_setmode()
988 if (bc->cfg.fclk < 1000000) in baycom_setmode()
989 bc->cfg.fclk = 1000000; in baycom_setmode()
990 if (bc->cfg.fclk > 25000000) in baycom_setmode()
991 bc->cfg.fclk = 25000000; in baycom_setmode()
1085 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, in baycom_ioctl()
1193 bc->cfg.fclk = 19666600; in baycom_epp_dev_setup()
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| /drivers/mmc/host/ |
| D | omap.c | 128 struct clk * fclk; member
192 clk_enable(host->fclk); in mmc_omap_fclk_enable()
194 clk_disable(host->fclk); in mmc_omap_fclk_enable()
1131 int func_clk_rate = clk_get_rate(host->fclk); in mmc_omap_calc_divisor()
1378 host->fclk = clk_get(&pdev->dev, "fck"); in mmc_omap_probe()
1379 if (IS_ERR(host->fclk)) { in mmc_omap_probe()
1380 ret = PTR_ERR(host->fclk); in mmc_omap_probe()
1391 clk_put(host->fclk); in mmc_omap_probe()
1405 clk_put(host->fclk); in mmc_omap_probe()
1456 clk_put(host->fclk); in mmc_omap_probe()
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| D | omap_hsmmc.c | 181 struct clk *fclk; member
622 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); in calc_divisor()
669 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000) in omap_hsmmc_set_clock()
1618 host->clk_rate = clk_get_rate(host->fclk); in omap_hsmmc_request()
2070 host->fclk = devm_clk_get(&pdev->dev, "fck"); in omap_hsmmc_probe()
2071 if (IS_ERR(host->fclk)) { in omap_hsmmc_probe()
2072 ret = PTR_ERR(host->fclk); in omap_hsmmc_probe()
2073 host->fclk = NULL; in omap_hsmmc_probe()
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| /drivers/clk/zynq/ |
| D | clkc.c | 113 static void __init zynq_clk_register_fclk(enum zynq_clk fclk, in zynq_clk_register_fclk() argument
158 clks[fclk] = clk_register_gate(NULL, clk_name, in zynq_clk_register_fclk()
163 if (clk_prepare_enable(clks[fclk])) in zynq_clk_register_fclk()
165 fclk - fclk0); in zynq_clk_register_fclk()
182 clks[fclk] = ERR_PTR(-ENOMEM); in zynq_clk_register_fclk()
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| /drivers/spi/ |
| D | spi-ti-qspi.c | 54 struct clk *fclk; member
158 clk_rate = clk_get_rate(qspi->fclk); in ti_qspi_setup()
699 qspi->fclk = devm_clk_get(&pdev->dev, "fck"); in ti_qspi_probe()
700 if (IS_ERR(qspi->fclk)) { in ti_qspi_probe()
701 ret = PTR_ERR(qspi->fclk); in ti_qspi_probe()
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| /drivers/i2c/busses/ |
| D | i2c-omap.c | 362 struct clk *fclk; in omap_i2c_init() local
380 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init()
381 fclk_rate = clk_get_rate(fclk); in omap_i2c_init()
382 clk_put(fclk); in omap_i2c_init()
412 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init()
413 fclk_rate = clk_get_rate(fclk) / 1000; in omap_i2c_init()
414 clk_put(fclk); in omap_i2c_init()
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| /drivers/clk/samsung/ |
| D | clk-exynos4.c | 1235 struct samsung_fixed_rate_clock fclk; in exynos4_clk_register_finpll() local
1251 fclk.id = CLK_FIN_PLL; in exynos4_clk_register_finpll()
1252 fclk.name = "fin_pll"; in exynos4_clk_register_finpll()
1253 fclk.parent_name = NULL; in exynos4_clk_register_finpll()
1254 fclk.flags = 0; in exynos4_clk_register_finpll()
1255 fclk.fixed_rate = finpll_f; in exynos4_clk_register_finpll()
1256 samsung_clk_register_fixed_rate(ctx, &fclk, 1); in exynos4_clk_register_finpll()
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| /drivers/usb/gadget/udc/ |
| D | at91_udc.c | 920 clk_enable(udc->fclk); in clk_on()
929 clk_disable(udc->fclk); in clk_off()
1877 udc->fclk = devm_clk_get(dev, "hclk"); in at91udc_probe()
1878 if (IS_ERR(udc->fclk)) in at91udc_probe()
1879 return PTR_ERR(udc->fclk); in at91udc_probe()
1882 clk_set_rate(udc->fclk, 48000000); in at91udc_probe()
1883 retval = clk_prepare(udc->fclk); in at91udc_probe()
1956 clk_unprepare(udc->fclk); in at91udc_probe()
1980 clk_unprepare(udc->fclk); in at91udc_remove()
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| D | at91_udc.h | 142 struct clk *iclk, *fclk; member
|