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Searched refs:iobase (Results 1 – 25 of 279) sorted by relevance

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/drivers/net/irda/
Dvia-ircc.c83 int iobase);
92 static int via_ircc_read_dongle_id(int iobase);
98 static void via_ircc_change_dongle_speed(int iobase, int speed,
100 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
102 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
103 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
418 int iobase; in via_remove_one() local
420 iobase = self->io.fir_base; in via_remove_one()
422 ResetChip(iobase, 5); //hardware reset. in via_remove_one()
451 int iobase = self->io.fir_base; in via_hw_init() local
[all …]
Dw83977af_ir.c86 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
89 static int w83977af_probe(int iobase, int irq, int dma);
94 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
95 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
149 static int w83977af_open(int i, unsigned int iobase, unsigned int irq, in w83977af_open() argument
157 if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) { in w83977af_open()
159 __func__ , iobase); in w83977af_open()
163 if (w83977af_probe(iobase, irq, dma) == -1) { in w83977af_open()
183 self->io.fir_base = iobase; in w83977af_open()
252 release_region(iobase, CHIP_IO_EXTENT); in w83977af_open()
[all …]
Dvia-ircc.h281 static void SetMaxRxPacketSize(__u16 iobase, __u16 size) in SetMaxRxPacketSize() argument
287 WriteReg(iobase, I_CF_L_2, low); in SetMaxRxPacketSize()
288 WriteReg(iobase, I_CF_H_2, high); in SetMaxRxPacketSize()
296 static void SetFIFO(__u16 iobase, __u16 value) in SetFIFO() argument
300 WriteRegBit(iobase, 0x11, 0, 0); in SetFIFO()
301 WriteRegBit(iobase, 0x11, 7, 1); in SetFIFO()
304 WriteRegBit(iobase, 0x11, 0, 0); in SetFIFO()
305 WriteRegBit(iobase, 0x11, 7, 0); in SetFIFO()
308 WriteRegBit(iobase, 0x11, 0, 1); in SetFIFO()
309 WriteRegBit(iobase, 0x11, 7, 0); in SetFIFO()
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Dali-ircc.c119 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
137 static void SIR2FIR(int iobase);
138 static void FIR2SIR(int iobase);
415 int iobase; in ali_ircc_close() local
419 iobase = self->io.fir_base; in ali_ircc_close()
548 int iobase = info->fir_base; in ali_ircc_setup() local
557 SIR2FIR(iobase); in ali_ircc_setup()
560 outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM in ali_ircc_setup()
563 switch_bank(iobase, BANK3); in ali_ircc_setup()
564 version = inb(iobase+FIR_ID_VR); in ali_ircc_setup()
[all …]
Dnsc-ircc.c176 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
181 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
185 static int nsc_ircc_read_dongle_id (int iobase);
186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
522 int iobase; in nsc_ircc_close() local
526 iobase = self->io.fir_base; in nsc_ircc_close()
988 int iobase = info->fir_base; in nsc_ircc_setup() local
991 switch_bank(iobase, BANK3); in nsc_ircc_setup()
992 version = inb(iobase+MID); in nsc_ircc_setup()
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Dsmsc-ircc2.c210 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
360 static inline void register_bank(int iobase, int bank) in register_bank() argument
362 outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)), in register_bank()
363 iobase + IRCC_MASTER); in register_bank()
755 int iobase = self->io.fir_base; in smsc_ircc_init_chip() local
757 register_bank(iobase, 0); in smsc_ircc_init_chip()
758 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER); in smsc_ircc_init_chip()
759 outb(0x00, iobase + IRCC_MASTER); in smsc_ircc_init_chip()
761 register_bank(iobase, 1); in smsc_ircc_init_chip()
762 outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | IRCC_CFGA_IRDA_SIR_A), in smsc_ircc_init_chip()
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/drivers/staging/comedi/drivers/
Dni_atmio16d.c162 outw(0xFFC2, dev->iobase + AM9513A_COM_REG); in reset_counters()
163 outw(0xFF02, dev->iobase + AM9513A_COM_REG); in reset_counters()
164 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
165 outw(0xFF0A, dev->iobase + AM9513A_COM_REG); in reset_counters()
166 outw(0x3, dev->iobase + AM9513A_DATA_REG); in reset_counters()
167 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
168 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
170 outw(0xFFC4, dev->iobase + AM9513A_COM_REG); in reset_counters()
171 outw(0xFF03, dev->iobase + AM9513A_COM_REG); in reset_counters()
172 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
[all …]
Dadv_pci_dio.c200 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_b() local
202 data[1] = inb(iobase); in pci_dio_insn_bits_di_b()
204 data[1] |= (inb(iobase + 1) << 8); in pci_dio_insn_bits_di_b()
206 data[1] |= (inb(iobase + 2) << 16); in pci_dio_insn_bits_di_b()
208 data[1] |= (inb(iobase + 3) << 24); in pci_dio_insn_bits_di_b()
219 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_w() local
221 data[1] = inw(iobase); in pci_dio_insn_bits_di_w()
223 data[1] |= (inw(iobase + 2) << 16); in pci_dio_insn_bits_di_w()
234 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_do_b() local
237 outb(s->state & 0xff, iobase); in pci_dio_insn_bits_do_b()
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Daddi_apci_1564.c184 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); in apci1564_reset()
185 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG); in apci1564_reset()
186 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG); in apci1564_reset()
187 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG); in apci1564_reset()
190 outl(0x0, dev->iobase + APCI1564_DO_REG); in apci1564_reset()
191 outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG); in apci1564_reset()
194 addi_watchdog_reset(dev->iobase + APCI1564_WDOG_IOBASE); in apci1564_reset()
201 unsigned long iobase = devpriv->counters + ADDI_TCW_CTRL_REG; in apci1564_reset() local
204 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_reset()
205 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_reset()
[all …]
Ddmm32at.c176 outb(DMM32AT_FIFO_CTRL_FIFORST, dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
180 dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
182 outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); in dmm32at_ai_set_chanspec()
183 outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); in dmm32at_ai_set_chanspec()
184 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); in dmm32at_ai_set_chanspec()
192 val = inb(dev->iobase + DMM32AT_AI_LSB_REG); in dmm32at_ai_get_sample()
193 val |= (inb(dev->iobase + DMM32AT_AI_MSB_REG) << 8); in dmm32at_ai_get_sample()
206 status = inb(dev->iobase + context); in dmm32at_ai_status()
229 outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG); in dmm32at_ai_insn_read()
353 outb(0, dev->iobase + DMM32AT_CTRDIO_CFG_REG); in dmm32at_setaitimer()
[all …]
Dni_daq_700.c94 outb(s->state & 0xff, dev->iobase + DIO_W); in daq700_dio_insn_bits()
98 val |= inb(dev->iobase + DIO_R) << 8; in daq700_dio_insn_bits()
129 status = inb(dev->iobase + STA_R2); in daq700_ai_eoc()
132 status = inb(dev->iobase + STA_R1); in daq700_ai_eoc()
158 outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3); in daq700_ai_rinsn()
162 outb(chan | 0x80, dev->iobase + CMD_R1); in daq700_ai_rinsn()
169 outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */ in daq700_ai_rinsn()
170 outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */ in daq700_ai_rinsn()
171 outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */ in daq700_ai_rinsn()
173 inw(dev->iobase + ADFIFO_R); in daq700_ai_rinsn()
[all …]
Daddi_apci_3501.c109 status = inl(dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_wait_for_dac()
133 outl(0, dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
137 dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
156 dev->iobase + APCI3501_AO_DATA_REG); in apci3501_ao_insn_write()
169 data[1] = inl(dev->iobase + APCI3501_DI_REG) & 0x3; in apci3501_di_insn_bits()
179 s->state = inl(dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
182 outl(s->state, dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
189 static void apci3501_eeprom_wait(unsigned long iobase) in apci3501_eeprom_wait() argument
194 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_wait()
198 static unsigned short apci3501_eeprom_readw(unsigned long iobase, in apci3501_eeprom_readw() argument
[all …]
Dpcmmio.c198 unsigned long iobase = dev->iobase; in pcmmio_dio_write() local
204 outb(val & 0xff, iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_write()
205 outb((val >> 8) & 0xff, iobase + PCMMIO_PORT_REG(port + 1)); in pcmmio_dio_write()
206 outb((val >> 16) & 0xff, iobase + PCMMIO_PORT_REG(port + 2)); in pcmmio_dio_write()
208 outb(PCMMIO_PAGE(page), iobase + PCMMIO_PAGE_LOCK_REG); in pcmmio_dio_write()
209 outb(val & 0xff, iobase + PCMMIO_PAGE_REG(0)); in pcmmio_dio_write()
210 outb((val >> 8) & 0xff, iobase + PCMMIO_PAGE_REG(1)); in pcmmio_dio_write()
211 outb((val >> 16) & 0xff, iobase + PCMMIO_PAGE_REG(2)); in pcmmio_dio_write()
220 unsigned long iobase = dev->iobase; in pcmmio_dio_read() local
227 val = inb(iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_read()
[all …]
Dquatech_daqp_cs.c169 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_clear_events()
189 outb(DAQP_CMD_STOP, dev->iobase + DAQP_CMD_REG); in daqp_ai_cancel()
190 outb(0, dev->iobase + DAQP_CTRL_REG); in daqp_ai_cancel()
191 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_cancel()
205 val = inb(dev->iobase + DAQP_AI_FIFO_REG); in daqp_ai_get_sample()
206 val |= inb(dev->iobase + DAQP_AI_FIFO_REG) << 8; in daqp_ai_get_sample()
221 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt()
246 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt()
277 outb(val & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry()
278 outb((val >> 8) & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry()
[all …]
/drivers/rtc/
Drtc-asm9260.c112 void __iomem *iobase; member
124 isr = ioread32(priv->iobase + HW_CIIR); in asm9260_rtc_irq()
130 iowrite32(0, priv->iobase + HW_CIIR); in asm9260_rtc_irq()
145 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
146 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
147 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
149 if (ctime1 != ioread32(priv->iobase + HW_CTIME1)) { in asm9260_rtc_read_time()
154 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
155 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
156 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
[all …]
/drivers/bluetooth/
Dbt3c_cs.c116 static inline void bt3c_address(unsigned int iobase, unsigned short addr) in bt3c_address() argument
118 outb(addr & 0xff, iobase + ADDR_L); in bt3c_address()
119 outb((addr >> 8) & 0xff, iobase + ADDR_H); in bt3c_address()
123 static inline void bt3c_put(unsigned int iobase, unsigned short value) in bt3c_put() argument
125 outb(value & 0xff, iobase + DATA_L); in bt3c_put()
126 outb((value >> 8) & 0xff, iobase + DATA_H); in bt3c_put()
130 static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value) in bt3c_io_write() argument
132 bt3c_address(iobase, addr); in bt3c_io_write()
133 bt3c_put(iobase, value); in bt3c_io_write()
137 static inline unsigned short bt3c_get(unsigned int iobase) in bt3c_get() argument
[all …]
Dbluecard_cs.c161 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_activity_led_timeout() local
168 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout()
171 outb(0x00, iobase + 0x30); in bluecard_activity_led_timeout()
178 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_enable_activity_led() local
185 outb(0x10 | 0x40, iobase + 0x30); in bluecard_enable_activity_led()
191 outb(0x08 | 0x20, iobase + 0x30); in bluecard_enable_activity_led()
203 static int bluecard_write(unsigned int iobase, unsigned int offset, __u8 *buf, int len) in bluecard_write() argument
209 outb_p(actual, iobase + offset); in bluecard_write()
212 outb_p(buf[i], iobase + offset + i + 1); in bluecard_write()
234 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_write_wakeup() local
[all …]
Dbtuart_cs.c111 static int btuart_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) in btuart_write() argument
116 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) in btuart_write()
122 outb(buf[actual], iobase + UART_TX); in btuart_write()
143 unsigned int iobase = info->p_dev->resource[0]->start; in btuart_write_wakeup() local
157 len = btuart_write(iobase, 16, skb->data, skb->len); in btuart_write_wakeup()
177 unsigned int iobase; in btuart_receive() local
185 iobase = info->p_dev->resource[0]->start; in btuart_receive()
203 hci_skb_pkt_type(info->rx_skb) = inb(iobase + UART_RX); in btuart_receive()
236 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX); in btuart_receive()
283 } while (inb(iobase + UART_LSR) & UART_LSR_DR); in btuart_receive()
[all …]
/drivers/irqchip/
Dirq-sa11x0.c31 static void __iomem *iobase; variable
41 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq()
43 writel_relaxed(reg, iobase + ICMR); in sa1100_mask_irq()
50 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq()
52 writel_relaxed(reg, iobase + ICMR); in sa1100_unmask_irq()
96 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend()
97 st->iclr = readl_relaxed(iobase + ICLR); in sa1100irq_suspend()
98 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend()
103 writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); in sa1100irq_suspend()
113 writel_relaxed(st->iccr, iobase + ICCR); in sa1100irq_resume()
[all …]
/drivers/net/hamradio/
Dbaycom_ser_fdx.c107 #define RBR(iobase) (iobase+0) argument
108 #define THR(iobase) (iobase+0) argument
109 #define IER(iobase) (iobase+1) argument
110 #define IIR(iobase) (iobase+2) argument
111 #define FCR(iobase) (iobase+2) argument
112 #define LCR(iobase) (iobase+3) argument
113 #define MCR(iobase) (iobase+4) argument
114 #define LSR(iobase) (iobase+5) argument
115 #define MSR(iobase) (iobase+6) argument
116 #define SCR(iobase) (iobase+7) argument
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Dbaycom_ser_hdx.c94 #define RBR(iobase) (iobase+0) argument
95 #define THR(iobase) (iobase+0) argument
96 #define IER(iobase) (iobase+1) argument
97 #define IIR(iobase) (iobase+2) argument
98 #define FCR(iobase) (iobase+2) argument
99 #define LCR(iobase) (iobase+3) argument
100 #define MCR(iobase) (iobase+4) argument
101 #define LSR(iobase) (iobase+5) argument
102 #define MSR(iobase) (iobase+6) argument
103 #define SCR(iobase) (iobase+7) argument
[all …]
Dyam.c115 int iobase; member
164 #define RBR(iobase) (iobase+0) argument
165 #define THR(iobase) (iobase+0) argument
166 #define IER(iobase) (iobase+1) argument
167 #define IIR(iobase) (iobase+2) argument
168 #define FCR(iobase) (iobase+2) argument
169 #define LCR(iobase) (iobase+3) argument
170 #define MCR(iobase) (iobase+4) argument
171 #define LSR(iobase) (iobase+5) argument
172 #define MSR(iobase) (iobase+6) argument
[all …]
/drivers/net/ethernet/dec/tulip/
Dde4x5.h16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
[all …]
/drivers/i2c/busses/
Di2c-xlr.c84 u32 __iomem *iobase; member
100 return !xlr_i2c_busy(priv, xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS)); in xlr_i2c_idle()
113 status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); in xlr_i2c_wait()
123 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, in xlr_i2c_tx_irq()
133 xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN); in xlr_i2c_rx_irq()
142 int_stat = xlr_i2c_rdreg(priv->iobase, XLR_I2C_INT_STAT); in xlr_i2c_irq()
146 xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_STAT, int_stat); in xlr_i2c_irq()
151 status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); in xlr_i2c_irq()
180 xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset); in xlr_i2c_tx()
181 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr); in xlr_i2c_tx()
[all …]
/drivers/char/pcmcia/
Dcm4000_cs.c304 static unsigned short io_read_num_rec_bytes(unsigned int iobase, in io_read_num_rec_bytes() argument
312 tmp = inb(REG_NUM_BYTES(iobase)) | in io_read_num_rec_bytes()
313 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0); in io_read_num_rec_bytes()
423 unsigned int iobase = dev->p_dev->resource[0]->start; in set_cardparameter() local
429 xoutb(dev->flags1, REG_FLAGS1(iobase)); in set_cardparameter()
433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase)); in set_cardparameter()
444 xoutb(stopbits, REG_STOPBITS(iobase)); in set_cardparameter()
456 unsigned int iobase = dev->p_dev->resource[0]->start; in set_protocol() local
492 xoutb(0x80, REG_FLAGS0(iobase)); in set_protocol()
499 xoutb(dev->flags1, REG_FLAGS1(iobase)); in set_protocol()
[all …]

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