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Searched refs:BIT13 (Results 1 – 18 of 18) sorted by relevance

/drivers/staging/emxx_udc/
Demxx_udc.h69 #define BIT13 0x00002000 macro
117 #define UFRAME (BIT14 + BIT13 + BIT12)
147 #define EP5_INT BIT13
174 #define EP5_EN BIT13
215 #define EP0_OUT_FULL BIT13
377 #define AHB_VBUS_INT BIT13 /* RW */
387 #define VBUS_INTEN BIT13 /* RW */
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h143 #define RCR_RXFTH BIT13
215 #define IMR_BcnInt BIT13
244 #define TPPoll_StopMgt BIT13
374 #define RRSR_MCS1 BIT13
/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h44 #define BIT13 0x00002000 macro
/drivers/staging/rtl8723bs/include/
Dhal_com_reg.h621 #define RRSR_MCS1 BIT13
791 #define IMR_BcnInt BIT13 /* Beacon DMA Interrupt 0 */
839 #define PHIMR_ATIMEND_E BIT13
915 #define UHIMR_ATIMEND_E BIT13
974 #define IMR_ATIMEND_E_88E BIT13 /* ATIM Window End Extension for Win7 */
1038 #define RCR_AMF BIT13 /* Accept management type frame */
Drtl8723b_spec.h243 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
Dosdep_service.h34 #define BIT13 0x00002000 macro
Drtw_mlme_ext.h57 #define DYNAMIC_BB_ADAPTIVITY BIT13/* ODM_BB_ADAPTIVITY */
/drivers/tty/
Dsynclink.c559 #define MISCSTATUS_TXC_LATCHED BIT13
580 #define SICR_TXC_ACTIVE BIT13
582 #define SICR_TXC (BIT13|BIT12)
1175 info->cmr_value &= ~BIT13; in mgsl_isr_receive_status()
1844 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12)); in shutdown()
4620 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12)); in usc_set_sdlc_mode()
4649 RegValue |= BIT13; in usc_set_sdlc_mode()
4684 case HDLC_ENCODING_NRZB: RegValue |= BIT13; break; in usc_set_sdlc_mode()
4686 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break; in usc_set_sdlc_mode()
4688 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 | BIT13; break; in usc_set_sdlc_mode()
[all …]
Dsynclink_gt.c412 #define IRQ_TXDATA BIT13
4264 val |= BIT15 + BIT13; in sync_mode()
4266 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4268 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
4339 val |= BIT15 + BIT13; in sync_mode()
4341 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4343 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
/drivers/staging/rtl8723bs/hal/
Dodm_debug.h74 #define ODM_COMP_RXHP BIT13
DHal8723BReg.h425 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
Drtl8723b_phycfg.c530 rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); in PHY_BBConfig8723B()
Dodm.h435 ODM_BB_ADAPTIVITY = BIT13,
/drivers/staging/rtl8192e/
Drtl819x_Qos.h23 #define BIT13 0x00002000 macro
/drivers/scsi/
Ddc395x.h63 #define BIT13 0x00002000 macro
/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h371 #define RRSR_MCS1 BIT13
/drivers/scsi/lpfc/
Dlpfc_hw4.h722 #define LPFC_SLI4_INTR13 BIT13
/drivers/char/pcmcia/
Dsynclink_cs.c292 #define IRQ_ALLSENT BIT13 // all sent