| /arch/arm/mach-imx/ |
| D | cpu-imx5.c | 130 u32 gpc; in imx5_pmu_init() local
152 gpc = readl_relaxed(tigerp_base + ARM_GPC); in imx5_pmu_init()
153 gpc |= DBGEN; in imx5_pmu_init()
154 writel_relaxed(gpc, tigerp_base + ARM_GPC); in imx5_pmu_init()
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| D | Makefile | 72 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
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| /arch/mips/boot/dts/ingenic/ |
| D | qi_lb60.dts | 108 col-gpios = <&gpc 10 0 &gpc 11 0 &gpc 12 0 &gpc 13 0
109 &gpc 14 0 &gpc 15 0 &gpc 16 0 &gpc 17 0>;
181 sck-gpios = <&gpc 23 GPIO_ACTIVE_HIGH>;
182 mosi-gpios = <&gpc 22 GPIO_ACTIVE_HIGH>;
183 cs-gpios = <&gpc 21 GPIO_ACTIVE_LOW>;
191 status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>;
263 rb-gpios = <&gpc 30 GPIO_ACTIVE_LOW>;
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| D | jz4770.dtsi | 107 gpc: gpio@2 { label
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| D | jz4740.dtsi | 126 gpc: gpio@2 { label
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| D | jz4780.dtsi | 120 gpc: gpio@2 { label
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| /arch/arm/plat-samsung/include/plat/ |
| D | gpio-core.h | 81 static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc) in to_samsung_gpio() argument
83 return container_of(gpc, struct samsung_gpio_chip, chip); in to_samsung_gpio()
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| /arch/arm/boot/dts/ |
| D | s3c64xx-pinctrl.dtsi | 33 gpc: gpc-gpio-bank { label
214 samsung,pins = "gpc-0", "gpc-1", "gpc-2";
220 samsung,pins = "gpc-3";
226 samsung,pins = "gpc-4", "gpc-5", "gpc-6";
232 samsung,pins = "gpc-7";
305 samsung,pins = "gpc-4";
311 samsung,pins = "gpc-5";
354 samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6",
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| D | imx6qp.dtsi | 90 &gpc {
91 compatible = "fsl,imx6qp-gpc", "fsl,imx6q-gpc";
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| D | s3c2416-pinctrl.dtsi | 25 gpc: gpc { label
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| D | imx6sx.dtsi | 140 interrupt-parent = <&gpc>;
150 interrupt-parent = <&gpc>;
163 interrupt-parent = <&gpc>;
772 gpc: gpc@20dc000 { label
773 compatible = "fsl,imx6sx-gpc", "fsl,imx6q-gpc";
1396 interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1397 <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1398 <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1399 <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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| D | imx6qdl.dtsi | 78 interrupt-parent = <&gpc>;
142 interrupt-parent = <&gpc>;
160 interrupt-parent = <&gpc>;
290 interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
291 <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
292 <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
293 <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
872 gpc: gpc@20dc000 { label
873 compatible = "fsl,imx6q-gpc";
|
| D | imx6sl.dtsi | 100 interrupt-parent = <&gpc>;
108 interrupt-parent = <&gpc>;
121 interrupt-parent = <&gpc>;
692 gpc: gpc@20dc000 { label
693 compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";
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| D | imx6ul.dtsi | 136 interrupt-parent = <&gpc>;
146 interrupt-parent = <&gpc>;
154 interrupt-parent = <&gpc>;
690 gpc: gpc@20dc000 { label
691 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
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| D | imx6sll.dtsi | 109 interrupt-parent = <&gpc>;
120 interrupt-parent = <&gpc>;
595 gpc: interrupt-controller@20dc000 { label
596 compatible = "fsl,imx6sll-gpc", "fsl,imx6q-gpc";
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| D | imx7s.dtsi | 112 interrupt-parent = <&gpc>;
154 interrupt-parent = <&gpc>;
176 interrupt-parent = <&gpc>;
643 gpc: gpc@303a0000 { label
644 compatible = "fsl,imx7d-gpc";
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| /arch/arm64/boot/dts/freescale/ |
| D | imx8mq.dtsi | 17 interrupt-parent = <&gpc>;
516 gpc: gpc@303a0000 { label
517 compatible = "fsl,imx8mq-gpc";
|