| /arch/arm64/net/ |
| D | bpf_jit_comp.c | 71 static inline void emit_a64_mov_i(const int is64, const int reg, in emit_a64_mov_i() argument
79 emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx); in emit_a64_mov_i()
81 emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx); in emit_a64_mov_i()
83 emit(A64_MOVK(is64, reg, lo, 0), ctx); in emit_a64_mov_i()
86 emit(A64_MOVZ(is64, reg, lo, 0), ctx); in emit_a64_mov_i()
88 emit(A64_MOVK(is64, reg, hi, 16), ctx); in emit_a64_mov_i()
357 const bool is64 = BPF_CLASS(code) == BPF_ALU64 || in build_insn() local
378 emit(A64_MOV(is64, dst, src), ctx); in build_insn()
383 emit(A64_ADD(is64, dst, dst, src), ctx); in build_insn()
387 emit(A64_SUB(is64, dst, dst, src), ctx); in build_insn()
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| /arch/riscv/net/ |
| D | bpf_jit_comp.c | 738 bool is64 = BPF_CLASS(insn->code) == BPF_ALU64 || in emit_insn() local
757 emit(is64 ? rv_addi(rd, rs, 0) : rv_addiw(rd, rs, 0), ctx); in emit_insn()
758 if (!is64 && !aux->verifier_zext) in emit_insn()
765 emit(is64 ? rv_add(rd, rd, rs) : rv_addw(rd, rd, rs), ctx); in emit_insn()
766 if (!is64 && !aux->verifier_zext) in emit_insn()
771 emit(is64 ? rv_sub(rd, rd, rs) : rv_subw(rd, rd, rs), ctx); in emit_insn()
772 if (!is64 && !aux->verifier_zext) in emit_insn()
778 if (!is64 && !aux->verifier_zext) in emit_insn()
784 if (!is64 && !aux->verifier_zext) in emit_insn()
790 if (!is64 && !aux->verifier_zext) in emit_insn()
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| /arch/x86/net/ |
| D | bpf_jit_comp32.c | 254 static inline void emit_ia32_mov_r64(const bool is64, const u8 dst[], in emit_ia32_mov_r64() argument
260 if (is64) in emit_ia32_mov_r64()
269 static inline void emit_ia32_mov_i64(const bool is64, const u8 dst[], in emit_ia32_mov_i64() argument
274 if (is64 && (val & (1<<31))) in emit_ia32_mov_i64()
522 static inline void emit_ia32_alu_r(const bool is64, const bool hi, const u8 op, in emit_ia32_alu_r() argument
542 if (hi && is64) in emit_ia32_alu_r()
549 if (hi && is64) in emit_ia32_alu_r()
576 static inline void emit_ia32_alu_r64(const bool is64, const u8 op, in emit_ia32_alu_r64() argument
583 emit_ia32_alu_r(is64, false, op, dst_lo, src_lo, dstk, sstk, &prog); in emit_ia32_alu_r64()
584 if (is64) in emit_ia32_alu_r64()
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| D | bpf_jit_comp.c | 375 static void emit_mov_reg(u8 **pprog, bool is64, u32 dst_reg, u32 src_reg) in emit_mov_reg() argument
380 if (is64) { in emit_mov_reg()
577 bool is64 = BPF_CLASS(insn->code) == BPF_ALU64; in do_jit() local
588 emit_mov_reg(&prog, is64, BPF_REG_0, src_reg); in do_jit()
590 emit_mov_imm32(&prog, is64, BPF_REG_0, imm32); in do_jit()
592 if (is64) in do_jit()
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| /arch/arm/net/ |
| D | bpf_jit_32.c | 630 static inline void emit_a32_mov_se_i64(const bool is64, const s8 dst[], in emit_a32_mov_se_i64() argument
634 if (is64 && (val & (1<<31))) in emit_a32_mov_se_i64()
640 const bool is64, const bool hi, in emit_a32_add_r() argument
648 if (!hi && is64) in emit_a32_add_r()
650 else if (hi && is64) in emit_a32_add_r()
657 const bool is64, const bool hi, in emit_a32_sub_r() argument
665 if (!hi && is64) in emit_a32_sub_r()
667 else if (hi && is64) in emit_a32_sub_r()
673 static inline void emit_alu_r(const u8 dst, const u8 src, const bool is64, in emit_alu_r() argument
678 emit_a32_add_r(dst, src, is64, hi, ctx); in emit_alu_r()
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| /arch/x86/include/asm/ |
| D | efi.h | 208 bool is64; member
221 return __efi_early()->is64; in efi_is_64bit()
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| /arch/arm/kvm/ |
| D | coproc.h | 123 #define is64 .is_64bit = true macro
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| D | coproc.c | 397 { CRm64( 2), Op1( 0), is64, access_vm_reg, reset_unknown64, c2_TTBR0 },
404 { CRm64( 2), Op1( 1), is64, access_vm_reg, reset_unknown64, c2_TTBR1 },
428 { CRm64( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR },
473 { CRm64(12), Op1( 0), is64, access_gic_sgi},
480 { CRm64(12), Op1( 1), is64, access_gic_sgi},
482 { CRm64(12), Op1( 2), is64, access_gic_sgi},
497 { CRm64(14), Op1( 2), is64, access_cntp_cval},
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| /arch/x86/events/intel/ |
| D | lbr.c | 840 int is64 = 0; in branch_type() local
898 is64 = kernel_ip((unsigned long)addr) || !test_thread_flag(TIF_IA32); in branch_type()
900 insn_init(&insn, addr, bytes_read, is64); in branch_type()
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