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Searched refs:DMAC (Results 1 – 24 of 24) sorted by relevance

/arch/sh/kernel/cpu/sh4/
Dsetup-sh7750.c182 HUDI, GPIOI, DMAC, enumerator
208 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } },
224 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
225 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
226 INTC_VECT(DMAC, 0x6c0),
237 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
238 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
239 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
240 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
241 INTC_VECT(DMAC, 0x6c0),
Dsetup-sh7760.c21 HUDI, GPIOI, DMAC, enumerator
45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
49 INTC_VECT(DMAC, 0x6c0),
106 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } },
/arch/sh/kernel/cpu/sh3/
Dsetup-sh7705.c26 DMAC, SCIF0, SCIF2, ADC_ADI, USB, enumerator
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
60 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
Dsetup-sh770x.c29 DMAC, SCIF0, SCIF2, SCI, ADC_ADI, enumerator
49 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
50 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
75 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7763.c241 HUDI, LCDC, DMAC, SCIF0, IIC0, IIC1, CMT, GETHER, HAC, enumerator
260 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
261 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
262 INTC_VECT(DMAC, 0x6c0),
265 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
305 PCIINTA, PCISERR, HAC, CMT, 0, 0, 0, DMAC,
319 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC, ADC } },
Dsetup-sh7770.c354 TMU, DMAC, I2S, SRC, GFX3D, SPI, SCIF, BBDMAC, enumerator
409 INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2),
425 DMAC, I2C, HUDI, SPDIF, IPI, HAC, TMU, GPIO } },
431 { 0xffe00008, 0, 32, 8, /* INT2PRI2 */ { DMAC, I2S, SRC, DU } },
/arch/sh/drivers/dma/
DKconfig6 bool "SuperH on-chip DMA controller (DMAC) support"
40 DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
52 tristate "PowerVR 2 DMAC support"
56 As this chains off of the on-chip DMAC, that must also be
/arch/arm/boot/dts/
Dr8a7793.dtsi1000 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a7794.dtsi966 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
Dr8a7745.dtsi1131 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
Dr8a7744.dtsi1199 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a7742.dtsi1163 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a7790.dtsi1114 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a7791.dtsi1234 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a7743.dtsi1199 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
/arch/arm64/boot/dts/renesas/
Dr8a774c0.dtsi1329 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a77990.dtsi1425 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a77961.dtsi1249 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a77965.dtsi1571 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a774b1.dtsi1578 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a77960.dtsi1830 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a774e1.dtsi1791 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a774a1.dtsi1705 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
Dr8a77951.dtsi1953 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/