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Searched refs:DISPLAY_VER (Results 1 – 25 of 52) sorted by relevance

123

/drivers/gpu/drm/i915/display/
Dintel_fbc.c71 if (DISPLAY_VER(dev_priv) == 7) in intel_fbc_calculate_cfb_size()
73 else if (DISPLAY_VER(dev_priv) >= 8) in intel_fbc_calculate_cfb_size()
113 if (DISPLAY_VER(dev_priv) == 2) in i8xx_fbc_activate()
122 if (DISPLAY_VER(dev_priv) == 4) { in i8xx_fbc_activate()
245 if (DISPLAY_VER(dev_priv) >= 6) in intel_fbc_recompress()
247 else if (DISPLAY_VER(dev_priv) >= 4) in intel_fbc_recompress()
310 if (DISPLAY_VER(dev_priv) == 9) { in gen7_fbc_activate()
348 if (DISPLAY_VER(dev_priv) >= 5) in intel_fbc_hw_is_active()
365 if (DISPLAY_VER(dev_priv) >= 7) in intel_fbc_hw_activate()
367 else if (DISPLAY_VER(dev_priv) >= 5) in intel_fbc_hw_activate()
[all …]
Di9xx_plane.c133 else if (DISPLAY_VER(dev_priv) >= 4) in i9xx_plane_has_fbc()
146 else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_plane_has_windowing()
148 else if (DISPLAY_VER(dev_priv) == 4) in i9xx_plane_has_windowing()
215 if (DISPLAY_VER(dev_priv) >= 4 && in i9xx_plane_ctl()
254 if (DISPLAY_VER(dev_priv) >= 4) in i9xx_check_plane_surface()
271 if (DISPLAY_VER(dev_priv) >= 4 && fb->modifier == I915_FORMAT_MOD_X_TILED) { in i9xx_check_plane_surface()
310 } else if (DISPLAY_VER(dev_priv) >= 4 && in i9xx_check_plane_surface()
368 if (DISPLAY_VER(dev_priv) < 5) in i9xx_plane_ctl_crtc()
442 if (DISPLAY_VER(dev_priv) >= 4) in i9xx_update_plane()
452 if (DISPLAY_VER(dev_priv) < 4) { in i9xx_update_plane()
[all …]
Dskl_universal_plane.c278 if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915)) in icl_nv12_y_plane_mask()
287 return DISPLAY_VER(dev_priv) >= 11 && in icl_is_nv12_y_plane()
293 return DISPLAY_VER(dev_priv) >= 11 && in icl_is_hdr_plane()
498 if (DISPLAY_VER(i915) >= 13) { in skl_plane_max_stride()
881 if (DISPLAY_VER(dev_priv) >= 10) in skl_plane_ctl_crtc()
905 if (DISPLAY_VER(dev_priv) < 10) { in skl_plane_ctl()
920 if (DISPLAY_VER(dev_priv) >= 11) in skl_plane_ctl()
930 if (DISPLAY_VER(dev_priv) == 13) in skl_plane_ctl()
941 if (DISPLAY_VER(dev_priv) >= 11) in glk_plane_color_ctl_crtc()
1032 if (DISPLAY_VER(dev_priv) >= 10) in skl_program_plane()
[all …]
Dintel_crtc.c73 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_crtc_max_vblank_count()
75 else if (DISPLAY_VER(dev_priv) >= 3) in intel_crtc_max_vblank_count()
268 if (DISPLAY_VER(dev_priv) >= 9) in intel_crtc_init()
282 if (DISPLAY_VER(dev_priv) >= 9) in intel_crtc_init()
305 else if (DISPLAY_VER(dev_priv) == 4) in intel_crtc_init()
309 else if (DISPLAY_VER(dev_priv) == 3) in intel_crtc_init()
314 if (DISPLAY_VER(dev_priv) >= 8) in intel_crtc_init()
330 if (DISPLAY_VER(dev_priv) < 9) { in intel_crtc_init()
338 if (DISPLAY_VER(dev_priv) >= 11) in intel_crtc_init()
549 if (DISPLAY_VER(dev_priv) >= 11 && in intel_pipe_update_end()
Dintel_fifo_underrun.c193 if (DISPLAY_VER(dev_priv) >= 13) in icl_pipe_status_underrun_mask()
208 if (DISPLAY_VER(dev_priv) >= 11) in bdw_set_fifo_underrun_reporting()
294 else if (DISPLAY_VER(dev_priv) == 7) in __intel_set_cpu_fifo_underrun_reporting()
296 else if (DISPLAY_VER(dev_priv) >= 8) in __intel_set_cpu_fifo_underrun_reporting()
417 if (DISPLAY_VER(dev_priv) >= 11) { in intel_cpu_fifo_underrun_irq_handler()
426 if (DISPLAY_VER(dev_priv) >= 11) in intel_cpu_fifo_underrun_irq_handler()
481 else if (DISPLAY_VER(dev_priv) == 7) in intel_check_cpu_fifo_underruns()
Dintel_psr.c124 if (DISPLAY_VER(dev_priv) >= 12) { in psr_irq_control()
190 if (DISPLAY_VER(dev_priv) >= 12) { in intel_psr_irq_handler()
211 if (DISPLAY_VER(dev_priv) >= 9) { in intel_psr_irq_handler()
339 if (DISPLAY_VER(dev_priv) >= 9 && in intel_psr_init_dpcd()
419 if (DISPLAY_VER(dev_priv) >= 8) in intel_psr_enable_sink()
436 if (DISPLAY_VER(dev_priv) >= 11) in intel_psr1_get_tp_time()
507 if (DISPLAY_VER(dev_priv) >= 8) in hsw_activate_psr1()
546 if (DISPLAY_VER(dev_priv) >= 10 && DISPLAY_VER(dev_priv) <= 12) in hsw_activate_psr2()
552 if (DISPLAY_VER(dev_priv) >= 12) { in hsw_activate_psr2()
585 } else if (DISPLAY_VER(dev_priv) >= 12) { in hsw_activate_psr2()
[all …]
Dintel_cdclk.c1393 else if (DISPLAY_VER(dev_priv) >= 11) in bxt_de_pll_readout()
1413 if (DISPLAY_VER(dev_priv) >= 11) in bxt_de_pll_readout()
1429 if (DISPLAY_VER(dev_priv) >= 12) in bxt_get_cdclk()
1431 else if (DISPLAY_VER(dev_priv) >= 11) in bxt_get_cdclk()
1557 if (DISPLAY_VER(dev_priv) >= 12) { in bxt_cdclk_cd2x_pipe()
1562 } else if (DISPLAY_VER(dev_priv) >= 11) { in bxt_cdclk_cd2x_pipe()
1606 if (DISPLAY_VER(dev_priv) >= 11) in bxt_set_cdclk()
1630 } else if (DISPLAY_VER(dev_priv) >= 11) { in bxt_set_cdclk()
1662 if (DISPLAY_VER(dev_priv) >= 11) { in bxt_set_cdclk()
1687 if (DISPLAY_VER(dev_priv) >= 11) in bxt_set_cdclk()
[all …]
Dintel_ddi.c114 if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) && in hsw_prepare_dp_ddi_buffers()
148 if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) && in hsw_prepare_hdmi_ddi_buffers()
179 if (DISPLAY_VER(dev_priv) < 10) { in intel_wait_ddi_buf_active()
430 if (DISPLAY_VER(dev_priv) >= 12) in intel_ddi_transcoder_func_reg_val_get()
498 if (DISPLAY_VER(dev_priv) >= 12) { in intel_ddi_transcoder_func_reg_val_get()
530 if (DISPLAY_VER(dev_priv) >= 11) { in intel_ddi_enable_transcoder_func()
576 if (DISPLAY_VER(dev_priv) >= 11) in intel_ddi_disable_transcoder_func()
590 if (DISPLAY_VER(dev_priv) >= 12) { in intel_ddi_disable_transcoder_func()
754 if (DISPLAY_VER(dev_priv) >= 12) { in intel_ddi_get_encoder_pipes()
895 if (DISPLAY_VER(dev_priv) >= 13) in intel_ddi_enable_pipe_clock()
[all …]
Dskl_scaler.c118 if (DISPLAY_VER(dev_priv) >= 9 && crtc_state->hw.enable && in skl_update_scaler()
160 (DISPLAY_VER(dev_priv) >= 11 && in skl_update_scaler()
163 (DISPLAY_VER(dev_priv) < 11 && in skl_update_scaler()
283 if (DISPLAY_VER(dev_priv) >= 11) in skl_update_scaler_plane()
329 if (DISPLAY_VER(dev_priv) == 9) { in intel_atomic_setup_scaler()
347 } else if (DISPLAY_VER(dev_priv) >= 10) { in intel_atomic_setup_scaler()
381 if (DISPLAY_VER(dev_priv) >= 14) { in intel_atomic_setup_scaler()
394 } else if (DISPLAY_VER(dev_priv) >= 10 || in intel_atomic_setup_scaler()
518 if (DISPLAY_VER(dev_priv) >= 10) in intel_atomic_setup_scalers()
Dintel_vrr.c71 if (DISPLAY_VER(i915) >= 13) in intel_vrr_vblank_exit_length()
135 if (DISPLAY_VER(i915) >= 13) in intel_vrr_compute_config()
166 if (DISPLAY_VER(dev_priv) >= 13) in intel_vrr_enable()
221 if (DISPLAY_VER(dev_priv) >= 13) in intel_vrr_get_config()
Dintel_display.c238 if (DISPLAY_VER(dev_priv) == 2) in pipe_scanline_is_moving()
278 if (DISPLAY_VER(dev_priv) >= 4) { in intel_wait_for_pipe_off()
805 if (DISPLAY_VER(dev_priv) == 13) in intel_enable_pipe()
864 if (DISPLAY_VER(dev_priv) >= 12) in intel_disable_pipe()
891 if (DISPLAY_VER(dev_priv) == 2) in intel_tile_width_bytes()
906 if (DISPLAY_VER(dev_priv) == 2 || HAS_128_BYTE_Y_TILING(dev_priv)) in intel_tile_width_bytes()
968 if (DISPLAY_VER(dev_priv) >= 9) in intel_linear_alignment()
973 else if (DISPLAY_VER(dev_priv) >= 4) in intel_linear_alignment()
981 return DISPLAY_VER(i915) >= 5; in has_async_flips()
1001 if (DISPLAY_VER(dev_priv) >= 12) { in intel_surf_alignment()
[all …]
Dintel_pipe_crc.c413 if (DISPLAY_VER(dev_priv) == 2) in get_new_crc_ctl_reg()
415 else if (DISPLAY_VER(dev_priv) < 5) in get_new_crc_ctl_reg()
421 else if (DISPLAY_VER(dev_priv) < 9) in get_new_crc_ctl_reg()
543 if (DISPLAY_VER(dev_priv) == 2) in intel_is_valid_crc_source()
545 else if (DISPLAY_VER(dev_priv) < 5) in intel_is_valid_crc_source()
551 else if (DISPLAY_VER(dev_priv) < 9) in intel_is_valid_crc_source()
Dintel_display_debugfs.c63 if (DISPLAY_VER(dev_priv) >= 8) in i915_fbc_status()
65 else if (DISPLAY_VER(dev_priv) >= 7) in i915_fbc_status()
67 else if (DISPLAY_VER(dev_priv) >= 5) in i915_fbc_status()
88 if (DISPLAY_VER(dev_priv) < 7 || !HAS_FBC(dev_priv)) in i915_fbc_false_color_get()
101 if (DISPLAY_VER(dev_priv) < 7 || !HAS_FBC(dev_priv)) in i915_fbc_false_color_set()
133 if (DISPLAY_VER(dev_priv) >= 8) { in i915_ips_status()
155 if (DISPLAY_VER(dev_priv) >= 9) in i915_sr_status()
560 if (DISPLAY_VER(dev_priv) >= 12) { in i915_dmc_info()
1200 if (DISPLAY_VER(dev_priv) < 9) in i915_ddb_info()
1349 if (DISPLAY_VER(i915) >= 13) { in i915_lpsp_status()
[all …]
Dintel_dp_mst.c184 if (DISPLAY_VER(dev_priv) < 12) in intel_dp_mst_transcoder_mask()
235 if (DISPLAY_VER(dev_priv) < 12) in intel_dp_mst_atomic_master_trans_check()
404 DISPLAY_VER(dev_priv) >= 12 && last_mst_stream && in intel_mst_post_disable_dp()
428 if (DISPLAY_VER(dev_priv) >= 9) in intel_mst_post_disable_dp()
454 if (DISPLAY_VER(dev_priv) < 12 || !last_mst_stream) in intel_mst_post_disable_dp()
502 DISPLAY_VER(dev_priv) >= 12 && first_mst_stream && in intel_mst_pre_enable_dp()
535 if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream) in intel_mst_pre_enable_dp()
570 if (DISPLAY_VER(dev_priv) >= 12 && pipe_config->fec_enable) in intel_mst_enable_dp()
960 if (DISPLAY_VER(i915) < 12 && port == PORT_A) in intel_dp_mst_encoder_init()
963 if (DISPLAY_VER(i915) < 11 && port == PORT_E) in intel_dp_mst_encoder_init()
Dintel_drrs.c149 if (DISPLAY_VER(dev_priv) >= 8 && !IS_CHERRYVIEW(dev_priv)) { in intel_dp_set_drrs_state()
162 } else if (DISPLAY_VER(dev_priv) > 6) { in intel_dp_set_drrs_state()
454 if (DISPLAY_VER(dev_priv) <= 6) { in intel_dp_drrs_init()
460 if ((DISPLAY_VER(dev_priv) < 8 && !HAS_GMCH(dev_priv)) && in intel_dp_drrs_init()
Dintel_dp_aux.c677 if (DISPLAY_VER(dev_priv) >= 12) { in intel_dp_aux_init()
680 } else if (DISPLAY_VER(dev_priv) >= 9) { in intel_dp_aux_init()
691 if (DISPLAY_VER(dev_priv) >= 9) in intel_dp_aux_init()
700 if (DISPLAY_VER(dev_priv) >= 9) in intel_dp_aux_init()
709 if (DISPLAY_VER(dev_priv) >= 13 && aux_ch >= AUX_CH_D_XELPD) in intel_dp_aux_init()
713 else if (DISPLAY_VER(dev_priv) >= 12 && aux_ch >= AUX_CH_USBC1) in intel_dp_aux_init()
Dintel_cursor.c343 if (DISPLAY_VER(dev_priv) >= 11) in i9xx_cursor_ctl_crtc()
352 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in i9xx_cursor_ctl_crtc()
387 if (DISPLAY_VER(dev_priv) == 13) in i9xx_cursor_ctl()
536 if (DISPLAY_VER(dev_priv) >= 9) in i9xx_update_cursor()
592 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_cursor_get_hw_state()
796 if (DISPLAY_VER(dev_priv) >= 4) in intel_cursor_plane_create()
805 if (DISPLAY_VER(dev_priv) >= 12) in intel_cursor_plane_create()
Dintel_audio.c252 if (DISPLAY_VER(dev_priv) < 12 && adjusted_mode->crtc_clock > 148500) in audio_config_hdmi_pixel_clock()
590 if (DISPLAY_VER(i915) < 11) in enable_audio_dsc_wa()
595 if (DISPLAY_VER(i915) == 11) in enable_audio_dsc_wa()
597 else if (DISPLAY_VER(i915) >= 12) in enable_audio_dsc_wa()
930 } else if (IS_HASWELL(dev_priv) || DISPLAY_VER(dev_priv) >= 8) { in intel_init_audio_hooks()
1007 if (DISPLAY_VER(dev_priv) >= 9) { in i915_audio_component_get_power()
1019 if (DISPLAY_VER(dev_priv) >= 10) in i915_audio_component_get_power()
1047 if (DISPLAY_VER(dev_priv) < 9) in i915_audio_component_codec_wake_override()
1303 if (DISPLAY_VER(dev_priv) >= 9) { in i915_audio_component_init()
1306 if (DISPLAY_VER(dev_priv) >= 12) in i915_audio_component_init()
Dintel_vga.c19 else if (DISPLAY_VER(i915) >= 5) in intel_vga_cntrl_reg()
102 unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; in intel_vga_set_state()
Dintel_bw.c144 if (DISPLAY_VER(dev_priv) == 12) in icl_get_qgv_points()
156 else if (DISPLAY_VER(dev_priv) == 11) in icl_get_qgv_points()
420 else if (DISPLAY_VER(dev_priv) == 12) in intel_bw_init_hw()
422 else if (DISPLAY_VER(dev_priv) == 11) in intel_bw_init_hw()
493 if (DISPLAY_VER(dev_priv) >= 13 && intel_vtd_active()) in intel_bw_data_rate()
688 if (DISPLAY_VER(dev_priv) < 11) in intel_bw_atomic_check()
Dintel_display_power.c434 pg = DISPLAY_VER(dev_priv) >= 11 ? ICL_PW_CTL_IDX_TO_PG(pw_idx) : in hsw_power_well_enable()
456 pg = DISPLAY_VER(dev_priv) >= 11 ? ICL_PW_CTL_IDX_TO_PG(pw_idx) : in hsw_power_well_enable()
497 if (DISPLAY_VER(dev_priv) < 12) { in icl_combo_phy_aux_power_well_enable()
563 if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port) in icl_tc_port_assert_ref_held()
632 if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port) in icl_tc_phy_aux_power_well_enable()
637 if (DISPLAY_VER(dev_priv) >= 12 && !is_tbt) { in icl_tc_phy_aux_power_well_enable()
716 if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) && in hsw_power_well_enabled()
811 if (DISPLAY_VER(dev_priv) >= 12) in gen9_dc_mask()
814 else if (DISPLAY_VER(dev_priv) == 11) in gen9_dc_mask()
1049 if (DISPLAY_VER(dev_priv) == 12) in assert_can_enable_dc5()
[all …]
Dintel_panel.c405 if (DISPLAY_VER(dev_priv) >= 4) in intel_gmch_panel_fitting()
419 if (DISPLAY_VER(dev_priv) >= 4) in intel_gmch_panel_fitting()
435 if (DISPLAY_VER(dev_priv) >= 4) in intel_gmch_panel_fitting()
445 if (DISPLAY_VER(dev_priv) < 4 && crtc_state->pipe_bpp == 18) in intel_gmch_panel_fitting()
/drivers/gpu/drm/i915/
Dintel_device_info.c268 else if (DISPLAY_VER(dev_priv) >= 11) { in intel_device_info_runtime_init()
271 } else if (DISPLAY_VER(dev_priv) >= 9) { in intel_device_info_runtime_init()
279 if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv)) in intel_device_info_runtime_init()
282 else if (DISPLAY_VER(dev_priv) >= 11) in intel_device_info_runtime_init()
285 else if (DISPLAY_VER(dev_priv) == 10) in intel_device_info_runtime_init()
304 } else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) { in intel_device_info_runtime_init()
336 } else if (HAS_DISPLAY(dev_priv) && DISPLAY_VER(dev_priv) >= 9) { in intel_device_info_runtime_init()
352 if (DISPLAY_VER(dev_priv) >= 12 && in intel_device_info_runtime_init()
364 if (DISPLAY_VER(dev_priv) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE)) in intel_device_info_runtime_init()
367 if (DISPLAY_VER(dev_priv) >= 10 && in intel_device_info_runtime_init()
Di915_irq.c195 if (DISPLAY_VER(dev_priv) >= 11) in intel_hpd_init_pins()
199 else if (DISPLAY_VER(dev_priv) >= 8) in intel_hpd_init_pins()
201 else if (DISPLAY_VER(dev_priv) >= 7) in intel_hpd_init_pins()
480 if (DISPLAY_VER(dev_priv) < 5) in i915_pipestat_enable_mask()
582 if (DISPLAY_VER(dev_priv) >= 4) in i915_enable_asle_pipestat()
809 if (DISPLAY_VER(dev_priv) == 2) in __intel_get_crtc_scanline()
859 bool use_scanline_counter = DISPLAY_VER(dev_priv) >= 5 || in i915_get_crtc_scanoutpos()
860 IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) == 2 || in i915_get_crtc_scanoutpos()
1307 (DISPLAY_VER(dev_priv) >= 8 && pipe_crc->skipped == 1)) { in display_pipe_crc_irq_handler()
1369 if (DISPLAY_VER(dev_priv) >= 3) in i9xx_pipe_crc_irq_handler()
[all …]
Dintel_pm.c2357 else if (DISPLAY_VER(dev_priv) != 2) in i9xx_update_wm()
2371 if (DISPLAY_VER(dev_priv) == 2) in i9xx_update_wm()
2386 if (DISPLAY_VER(dev_priv) == 2) in i9xx_update_wm()
2398 if (DISPLAY_VER(dev_priv) == 2) in i9xx_update_wm()
2670 if (DISPLAY_VER(dev_priv) >= 8) in ilk_display_fifo_size()
2672 else if (DISPLAY_VER(dev_priv) >= 7) in ilk_display_fifo_size()
2682 if (DISPLAY_VER(dev_priv) >= 8) in ilk_plane_wm_reg_max()
2685 else if (DISPLAY_VER(dev_priv) >= 7) in ilk_plane_wm_reg_max()
2699 if (DISPLAY_VER(dev_priv) >= 7) in ilk_cursor_wm_reg_max()
2707 if (DISPLAY_VER(dev_priv) >= 8) in ilk_fbc_wm_reg_max()
[all …]

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