| /drivers/clk/hisilicon/ |
| D | clk-hi3620.c | 284 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_determine_rate() local
286 if ((req->rate <= 13000000) && (mclk->id == HI3620_MMC_CIUCLK1)) { in mmc_clk_determine_rate()
323 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_set_timing() local
360 val = readl_relaxed(mclk->clken_reg); in mmc_clk_set_timing()
361 val &= ~(1 << mclk->clken_bit); in mmc_clk_set_timing()
362 writel_relaxed(val, mclk->clken_reg); in mmc_clk_set_timing()
364 val = readl_relaxed(mclk->sam_reg); in mmc_clk_set_timing()
365 val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits); in mmc_clk_set_timing()
366 writel_relaxed(val, mclk->sam_reg); in mmc_clk_set_timing()
368 val = readl_relaxed(mclk->drv_reg); in mmc_clk_set_timing()
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| /drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 1242 u32 *sclk, u32 *mclk) in btc_skip_blacklist_clocks() argument
1246 if ((sclk == NULL) || (mclk == NULL)) in btc_skip_blacklist_clocks()
1253 (btc_blacklist_clocks[i].mclk == *mclk)) in btc_skip_blacklist_clocks()
1262 btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk); in btc_skip_blacklist_clocks()
1272 if ((pl->mclk == 0) || (pl->sclk == 0)) in btc_adjust_clock_combinations()
1275 if (pl->mclk == pl->sclk) in btc_adjust_clock_combinations()
1278 if (pl->mclk > pl->sclk) { in btc_adjust_clock_combinations()
1279 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1282 (pl->mclk + in btc_adjust_clock_combinations()
1286 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
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| D | rv730_dpm.c | 118 LPRV7XX_SMC_MCLK_VALUE mclk) in rv730_populate_mclk_value() argument
183 mclk->mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_mclk_value()
184 mclk->mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_mclk_value()
185 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock); in rv730_populate_mclk_value()
186 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_mclk_value()
187 mclk->mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_mclk_value()
188 mclk->mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_mclk_value()
189 mclk->mclk730.vMPLL_SS = cpu_to_be32(mpll_ss); in rv730_populate_mclk_value()
190 mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv730_populate_mclk_value()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
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| D | rv740_dpm.c | 187 RV7XX_SMC_MCLK_VALUE *mclk) in rv740_populate_mclk_value() argument
274 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv740_populate_mclk_value()
275 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_mclk_value()
276 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_mclk_value()
277 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_mclk_value()
278 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_mclk_value()
279 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_mclk_value()
280 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv740_populate_mclk_value()
281 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1); in rv740_populate_mclk_value()
282 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv740_populate_mclk_value()
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| D | rv770_dpm.c | 389 RV7XX_SMC_MCLK_VALUE *mclk) in rv770_populate_mclk_value() argument
474 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv770_populate_mclk_value()
475 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv770_populate_mclk_value()
476 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv770_populate_mclk_value()
477 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv770_populate_mclk_value()
478 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_mclk_value()
479 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv770_populate_mclk_value()
480 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv770_populate_mclk_value()
593 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in rv770_populate_mvdd_value() argument
604 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
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| D | cypress_dpm.c | 422 u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk) in cypress_get_strobe_mode_settings() argument
429 if (mclk <= pi->mclk_strobe_mode_threshold) in cypress_get_strobe_mode_settings()
431 result = cypress_get_mclk_frequency_ratio(rdev, mclk, strobe_mode); in cypress_get_strobe_mode_settings()
474 RV7XX_SMC_MCLK_VALUE *mclk, in cypress_populate_mclk_value() argument
600 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in cypress_populate_mclk_value()
601 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in cypress_populate_mclk_value()
602 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in cypress_populate_mclk_value()
603 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in cypress_populate_mclk_value()
604 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in cypress_populate_mclk_value()
605 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in cypress_populate_mclk_value()
[all …]
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| D | ni_dpm.c | 791 u32 mclk; in ni_apply_state_adjust_rules() local
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
823 ps->performance_levels[0].mclk = in ni_apply_state_adjust_rules()
824 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()
829 btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, in ni_apply_state_adjust_rules()
831 &ps->performance_levels[0].mclk); in ni_apply_state_adjust_rules()
842 mclk = ps->performance_levels[0].mclk; in ni_apply_state_adjust_rules()
845 if (mclk < ps->performance_levels[i].mclk) in ni_apply_state_adjust_rules()
846 mclk = ps->performance_levels[i].mclk; in ni_apply_state_adjust_rules()
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| D | si_dpm.c | 2953 u32 mclk, sclk; in si_apply_state_adjust_rules() local
3017 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3018 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3042 if (ps->performance_levels[i].mclk > max_mclk_vddci) in si_apply_state_adjust_rules()
3043 ps->performance_levels[i].mclk = max_mclk_vddci; in si_apply_state_adjust_rules()
3046 if (ps->performance_levels[i].mclk > max_mclk_vddc) in si_apply_state_adjust_rules()
3047 ps->performance_levels[i].mclk = max_mclk_vddc; in si_apply_state_adjust_rules()
3050 if (ps->performance_levels[i].mclk > max_mclk) in si_apply_state_adjust_rules()
3051 ps->performance_levels[i].mclk = max_mclk; in si_apply_state_adjust_rules()
3062 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()
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| D | ci_dpm.c | 778 u32 sclk, mclk; in ci_apply_state_adjust_rules() local
807 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()
808 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()
817 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()
820 mclk = ps->performance_levels[0].mclk; in ci_apply_state_adjust_rules()
827 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()
828 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()
832 ps->performance_levels[0].mclk = mclk; in ci_apply_state_adjust_rules()
838 if (ps->performance_levels[0].mclk < ps->performance_levels[1].mclk) in ci_apply_state_adjust_rules()
839 ps->performance_levels[0].mclk = ps->performance_levels[1].mclk; in ci_apply_state_adjust_rules()
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| /drivers/media/dvb-frontends/ |
| D | stv0900_sw.c | 42 max_carrier /= intp->mclk / 1000; in stv0900_check_signal_presence()
69 max_carrier /= intp->mclk / 1000; in stv0900_get_sw_loop_params()
75 freq_inc /= intp->mclk >> 10; in stv0900_get_sw_loop_params()
135 max_carrier /= intp->mclk / 1000; in stv0900_search_carr_sw_loop()
295 u32 mclk, in stv0900_get_symbol_rate() argument
310 intval1 = (mclk) >> 16; in stv0900_get_symbol_rate()
313 rem1 = (mclk) % 0x10000; in stv0900_get_symbol_rate()
323 u32 mclk, u32 srate, in stv0900_set_symbol_rate() argument
328 dprintk("%s: Mclk %d, SR %d, Dmd %d\n", __func__, mclk, in stv0900_set_symbol_rate()
333 symb /= (mclk >> 12); in stv0900_set_symbol_rate()
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| D | stv6110.c | 28 u32 mclk; member
210 ((((priv->mclk / 1000000) - 16) & 0x1f) << 3); in stv6110_init()
239 freq = divider * (priv->mclk / 1000); in stv6110_get_frequency()
256 frequency, priv->mclk); in stv6110_set_frequency()
261 ((((priv->mclk / 1000000) - 16) & 0x1f) << 3); in stv6110_set_frequency()
290 p_calc = (priv->mclk / 100000); in stv6110_set_frequency()
295 p_calc_opt = (priv->mclk / 100000); in stv6110_set_frequency()
299 ref = priv->mclk / ((1 << (r_div_opt + 1)) * (1 << (p + 1))); in stv6110_set_frequency()
329 vco_freq = divider * ((priv->mclk / 1000) / ((1 << (r_div_opt + 1)))); in stv6110_set_frequency()
417 priv->mclk = config->mclk; in stv6110_attach()
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| D | m88rs2000.c | 104 u32 mclk; in m88rs2000_get_mclk() local
114 mclk = (u32)(reg * RS2000_FE_CRYSTAL_KHZ + 28 / 2) / 28; in m88rs2000_get_mclk()
116 return mclk; in m88rs2000_get_mclk()
122 u32 mclk; in m88rs2000_set_carrieroffset() local
127 mclk = m88rs2000_get_mclk(fe); in m88rs2000_set_carrieroffset()
128 if (!mclk) in m88rs2000_set_carrieroffset()
131 tmp = (offset * 4096 + (s32)mclk / 2) / (s32)mclk; in m88rs2000_set_carrieroffset()
152 u32 mclk; in m88rs2000_set_symbolrate() local
158 mclk = m88rs2000_get_mclk(fe); in m88rs2000_set_symbolrate()
159 if (!mclk) in m88rs2000_set_symbolrate()
[all …]
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| D | mn88443x.c | 190 struct clk *mclk; member
213 ret = clk_prepare_enable(chip->mclk); in mn88443x_cmn_power_on()
240 clk_disable_unprepare(chip->mclk); in mn88443x_cmn_power_off()
695 chip->mclk = devm_clk_get(dev, "mclk"); in mn88443x_probe()
696 if (IS_ERR(chip->mclk) && !conf) { in mn88443x_probe()
698 PTR_ERR(chip->mclk)); in mn88443x_probe()
699 return PTR_ERR(chip->mclk); in mn88443x_probe()
718 chip->mclk = conf->mclk; in mn88443x_probe()
744 chip->clk_freq = clk_get_rate(chip->mclk); in mn88443x_probe()
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| /drivers/staging/iio/frequency/ |
| D | ad9832.c | 99 struct clk *mclk; member
121 static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout) in ad9832_calc_freqreg() argument
125 do_div(freqreg, mclk); in ad9832_calc_freqreg()
134 if (fout > (clk_get_rate(st->mclk) / 2)) in ad9832_write_frequency()
137 regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout); in ad9832_write_frequency()
338 st->mclk = devm_clk_get(&spi->dev, "mclk"); in ad9832_probe()
339 if (IS_ERR(st->mclk)) { in ad9832_probe()
340 ret = PTR_ERR(st->mclk); in ad9832_probe()
344 ret = clk_prepare_enable(st->mclk); in ad9832_probe()
431 clk_disable_unprepare(st->mclk); in ad9832_probe()
[all …]
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| D | ad9834.c | 73 struct clk *mclk; member
101 static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout) in ad9834_calc_freqreg() argument
105 do_div(freqreg, mclk); in ad9834_calc_freqreg()
115 clk_freq = clk_get_rate(st->mclk); in ad9834_write_frequency()
434 st->mclk = devm_clk_get(&spi->dev, NULL); in ad9834_probe()
435 if (IS_ERR(st->mclk)) { in ad9834_probe()
436 ret = PTR_ERR(st->mclk); in ad9834_probe()
440 ret = clk_prepare_enable(st->mclk); in ad9834_probe()
446 ret = devm_add_action_or_reset(&spi->dev, ad9834_disable_clk, st->mclk); in ad9834_probe()
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| /drivers/iio/adc/ |
| D | ad7766.c | 38 struct clk *mclk; member
98 ret = clk_prepare_enable(ad7766->mclk); in ad7766_preenable()
122 clk_disable_unprepare(ad7766->mclk); in ad7766_postdisable()
144 *val = clk_get_rate(ad7766->mclk) / in ad7766_read_raw()
225 ad7766->mclk = devm_clk_get(&spi->dev, "mclk"); in ad7766_probe()
226 if (IS_ERR(ad7766->mclk)) in ad7766_probe()
227 return PTR_ERR(ad7766->mclk); in ad7766_probe()
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| /drivers/gpu/drm/amd/pm/powerplay/ |
| D | si_dpm.c | 3272 if ((pl->mclk == 0) || (pl->sclk == 0)) in btc_adjust_clock_combinations()
3275 if (pl->mclk == pl->sclk) in btc_adjust_clock_combinations()
3278 if (pl->mclk > pl->sclk) { in btc_adjust_clock_combinations()
3279 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > adev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
3282 (pl->mclk + in btc_adjust_clock_combinations()
3286 if ((pl->sclk - pl->mclk) > adev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
3287 pl->mclk = btc_get_valid_mclk(adev, in btc_adjust_clock_combinations()
3288 max_limits->mclk, in btc_adjust_clock_combinations()
3414 u32 mclk, sclk; in si_apply_state_adjust_rules() local
3475 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
[all …]
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| /drivers/spi/ |
| D | spi-sun4i.c | 81 struct clk *mclk; member
269 mclk_rate = clk_get_rate(sspi->mclk); in sun4i_spi_transfer_one()
271 clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); in sun4i_spi_transfer_one()
272 mclk_rate = clk_get_rate(sspi->mclk); in sun4i_spi_transfer_one()
399 ret = clk_prepare_enable(sspi->mclk); in sun4i_spi_runtime_resume()
421 clk_disable_unprepare(sspi->mclk); in sun4i_spi_runtime_suspend()
480 sspi->mclk = devm_clk_get(&pdev->dev, "mod"); in sun4i_spi_probe()
481 if (IS_ERR(sspi->mclk)) { in sun4i_spi_probe()
483 ret = PTR_ERR(sspi->mclk); in sun4i_spi_probe()
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| D | spi-sun6i.c | 94 struct clk *mclk; member
361 mclk_rate = clk_get_rate(sspi->mclk); in sun6i_spi_transfer_one()
363 clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); in sun6i_spi_transfer_one()
364 mclk_rate = clk_get_rate(sspi->mclk); in sun6i_spi_transfer_one()
524 ret = clk_prepare_enable(sspi->mclk); in sun6i_spi_runtime_resume()
542 clk_disable_unprepare(sspi->mclk); in sun6i_spi_runtime_resume()
555 clk_disable_unprepare(sspi->mclk); in sun6i_spi_runtime_suspend()
632 sspi->mclk = devm_clk_get(&pdev->dev, "mod"); in sun6i_spi_probe()
633 if (IS_ERR(sspi->mclk)) { in sun6i_spi_probe()
635 ret = PTR_ERR(sspi->mclk); in sun6i_spi_probe()
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| /drivers/mfd/ |
| D | sm501.c | 391 unsigned long mclk; member
407 unsigned long mclk, in sm501_calc_clock() argument
422 diff = DIV_ROUND_CLOSEST(mclk, divider << shift) - freq; in sm501_calc_clock()
430 clock->mclk = mclk; in sm501_calc_clock()
452 unsigned long mclk; in sm501_calc_pll() local
463 mclk = (24000000UL * m / n) >> k; in sm501_calc_pll()
466 mclk, &best_diff)) { in sm501_calc_pll()
476 return clock->mclk / (clock->divider << clock->shift); in sm501_calc_pll()
490 unsigned long mclk; in sm501_select_clock() local
494 for (mclk = 288000000; mclk <= 336000000; mclk += 48000000) { in sm501_select_clock()
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| D | madera-core.c | 479 madera->mclk[MADERA_MCLK1].id = "mclk1"; in madera_dev_init()
480 madera->mclk[MADERA_MCLK2].id = "mclk2"; in madera_dev_init()
481 madera->mclk[MADERA_MCLK3].id = "mclk3"; in madera_dev_init()
483 ret = devm_clk_bulk_get_optional(madera->dev, ARRAY_SIZE(madera->mclk), in madera_dev_init()
484 madera->mclk); in madera_dev_init()
491 if (!madera->mclk[MADERA_MCLK2].clk) in madera_dev_init()
718 ret = clk_prepare_enable(madera->mclk[MADERA_MCLK2].clk); in madera_dev_init()
752 clk_disable_unprepare(madera->mclk[MADERA_MCLK2].clk); in madera_dev_init()
787 clk_disable_unprepare(madera->mclk[MADERA_MCLK2].clk); in madera_dev_exit()
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| /drivers/i2c/busses/ |
| D | i2c-bcm2835.c | 164 struct clk *mclk, in bcm2835_i2c_register_div() argument
174 mclk_name = __clk_get_name(mclk); in bcm2835_i2c_register_div()
413 struct clk *mclk; in bcm2835_i2c_probe() local
428 mclk = devm_clk_get(&pdev->dev, NULL); in bcm2835_i2c_probe()
429 if (IS_ERR(mclk)) in bcm2835_i2c_probe()
430 return dev_err_probe(&pdev->dev, PTR_ERR(mclk), in bcm2835_i2c_probe()
433 i2c_dev->bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk, i2c_dev); in bcm2835_i2c_probe()
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| /drivers/staging/iio/impedance-analyzer/ |
| D | ad5933.c | 88 struct clk *mclk; member
674 clk_disable_unprepare(st->mclk); in ad5933_clk_disable()
715 st->mclk = devm_clk_get(&client->dev, "mclk"); in ad5933_probe()
716 if (IS_ERR(st->mclk) && PTR_ERR(st->mclk) != -ENOENT) in ad5933_probe()
717 return PTR_ERR(st->mclk); in ad5933_probe()
719 if (!IS_ERR(st->mclk)) { in ad5933_probe()
720 ret = clk_prepare_enable(st->mclk); in ad5933_probe()
730 ext_clk_hz = clk_get_rate(st->mclk); in ad5933_probe()
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| /drivers/gpu/drm/bridge/ |
| D | sii902x.c | 180 struct clk *mclk; member
465 unsigned int mclk) in sii902x_select_mclk_div() argument
467 int div = mclk / rate; in sii902x_select_mclk_div()
576 ret = clk_prepare_enable(sii902x->audio.mclk); in sii902x_audio_hw_params()
582 if (sii902x->audio.mclk) { in sii902x_audio_hw_params()
583 mclk_rate = clk_get_rate(sii902x->audio.mclk); in sii902x_audio_hw_params()
655 clk_disable_unprepare(sii902x->audio.mclk); in sii902x_audio_hw_params()
674 clk_disable_unprepare(sii902x->audio.mclk); in sii902x_audio_shutdown()
788 sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk"); in sii902x_audio_codec_init()
789 if (IS_ERR(sii902x->audio.mclk)) { in sii902x_audio_codec_init()
[all …]
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| /drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramgt215.c | 456 gt215_ram_lock_pll(struct gt215_ramfuc *fuc, struct gt215_clk_info *mclk) in gt215_ram_lock_pll() argument
458 ram_wr32(fuc, 0x004004, mclk->pll); in gt215_ram_lock_pll()
500 struct gt215_clk_info mclk; in gt215_ram_calc() local
551 ret = gt215_pll_info(device->clk, 0x12, 0x4000, freq, &mclk); in gt215_ram_calc()
602 pll2pll = (!(ctrl & 0x00000008)) && mclk.pll; in gt215_ram_calc()
615 if (mclk.pll && !pll2pll) { in gt215_ram_calc()
616 ram_mask(fuc, 0x004128, 0x003f3141, mclk.clk | 0x00000101); in gt215_ram_calc()
617 gt215_ram_lock_pll(fuc, &mclk); in gt215_ram_calc()
691 gt215_ram_lock_pll(fuc, &mclk); in gt215_ram_calc()
694 if (mclk.pll) { in gt215_ram_calc()
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